Mangiferin ameliorates cardiac fibrosis in D-galactose-induced aging rats by inhibiting TGF-ß/p38/MK2 signaling pathway.

Aging is the process spontaneously occurred in living organisms. Cardiac fibrosis is a pathophysiological process of cardiac aging. Mangiferin is a wellknown C-glucoside xanthone in mango leaves with lots of beneficial properties. In this study, rat model of cardiac fibrosis was induced by injected with 150 mg/kg/d Dgalactose for 8 weeks. The age-related cardiac decline was estimated by detecting the relative weight of heart, the serum levels of cardiac injury indicators and the expression of hypertrophic biomakers. Cardiac oxidative stress and local inflammation were measured by detecting the levels of malondialdehyde, enzymatic antioxidant status and proinflammatory cytokines. Cardiac fibrosis was evaluated by observing collagen deposition via masson and sirius red staining, as well as by examining the expression of extracellular matrix proteins via Western blot analysis. The cardiac activity of profibrotic TGF-ß1/p38/MK2 signaling pathway was assessed by measuring the expression of TGF-ß1 and the phosphorylation levels of p38 and MK2. It was observed that mangiferin ameliorated D-galactose-induced cardiac aging, attenuated cardiac oxidative stress, inflammation and fibrosis, as well as inhibited the activation of TGF-ß1/p38/MK2 signaling pathway. These results showed that mangiferin could ameliorate cardiac fibrosis in D-galactose-induced aging rats possibly via inhibiting TGF-ß/p38/MK2 signaling pathway.

Programming memristor arrays with arbitrarily high precision for analog computing.

In-memory computing represents an effective method for modeling complex physical systems that are typically challenging for conventional computing architectures but has been hindered by issues such as reading noise and writing variability that restrict scalability, accuracy, and precision in high-performance computations. We propose and demonstrate a circuit architecture and programming protocol that converts the analog computing result to digital at the last step and enables low-precision analog devices to perform high-precision computing. We use a weighted sum of multiple devices to represent one number, in which subsequently programmed devices are used to compensate for preceding programming errors. With a memristor system-on-chip, we experimentally demonstrate high-precision solutions for multiple scientific computing tasks while maintaining a substantial power efficiency advantage over conventional digital approaches.

Diagnosis and treatment of traumatic reticulitis associated with abomasal obstruction in beef cattle during late pregnancy: A case report.

Background: Traumatic reticulitis (TR) and abomasal obstruction are common digestive diseases in beef cattle. In clinical practice, these two conditions are often detected alone and rarely occur at the same time. Surgical therapy is an effective approach to treat both of these diseases. However, there are no reports on the treatment of abomasal obstruction in cattle induced by TR. Case Description: We here report a rare case of the diagnosis and treatment of TR associated with abomasal obstruction in a beef cow during late pregnancy. The affected cattle had an iron wire that was piercing the wall of the reticulum, but did not penetrate the wall; the abomasum was blocked and appeared solid; and the fetus survived well in utero (268 days gestation). To save the lives of the cow and fetus on the same day, a cesarean section was first performed, followed by rumenotomy, the foreign body (wire) was removed, and abomasotomy was finally performed. The fetus removed by cesarean section grew well, and the beef cow recovered and successfully became pregnant again. Conclusion: This case thus offers guidance for the timely diagnosis, effective treatment, and postoperative management of these digestive diseases in cattle to prevent progression and further complications.

Memristive Field-Programmable Analog Arrays for Analog Computing.

The increasing interests in analog computing nowadays call for multipurpose analog computing platforms with reconfigurability. The advancement of analog computing, enabled by novel electronic elements like memristors, has shown its potential to sustain the exponential growth of computing demand in the new era of analog data deluge. Here, a platform of a memristive field-programmable analog array (memFPAA) is experimentally demonstrated with memristive devices serving as a variety of core analog elements and CMOS components as peripheral circuits. The memFPAA is reconfigured to implement a first-order band pass filter, an audio equalizer, and an acoustic mixed frequency classifier, as application examples. The memFPAA, featured with programmable analog memristors, memristive routing networks, and memristive vector-matrix multipliers, opens opportunities for fast prototyping analog designs as well as efficient analog applications in signal processing and neuromorphic computing.

Memristor-Based Analog Computation and Neural Network Classification with a Dot Product Engine.

Using memristor crossbar arrays to accelerate computations is a promising approach to efficiently implement algorithms in deep neural networks. Early demonstrations, however, are limited to simulations or small-scale problems primarily due to materials and device challenges that limit the size of the memristor crossbar arrays that can be reliably programmed to stable and analog values, which is the focus of the current work. High-precision analog tuning and control of memristor cells across a 128 × 64 array is demonstrated, and the resulting vector matrix multiplication (VMM) computing precision is evaluated. Single-layer neural network inference is performed in these arrays, and the performance compared to a digital approach is assessed. Memristor computing system used here reaches a VMM accuracy equivalent of 6 bits, and an 89.9% recognition accuracy is achieved for the 10k MNIST handwritten digit test set. Forecasts show that with integrated (on chip) and scaled memristors, a computational efficiency greater than 100 trillion operations per second per Watt is possible.

Efficient and self-adaptive in-situ learning in multilayer memristor neural networks.

Memristors with tunable resistance states are emerging building blocks of artificial neural networks. However, in situ learning on a large-scale multiple-layer memristor network has yet to be demonstrated because of challenges in device property engineering and circuit integration. Here we monolithically integrate hafnium oxide-based memristors with a foundry-made transistor array into a multiple-layer neural network. We experimentally demonstrate in situ learning capability and achieve competitive classification accuracy on a standard machine learning dataset, which further confirms that the training algorithm allows the network to adapt to hardware imperfections. Our simulation using the experimental parameters suggests that a larger network would further increase the classification accuracy. The memristor neural network is a promising hardware platform for artificial intelligence with high speed-energy efficiency.

Capacitive neural network with neuro-transistors.

Experimental demonstration of resistive neural networks has been the recent focus of hardware implementation of neuromorphic computing. Capacitive neural networks, which call for novel building blocks, provide an alternative physical embodiment of neural networks featuring a lower static power and a better emulation of neural functionalities. Here, we develop neuro-transistors by integrating dynamic pseudo-memcapacitors as the gates of transistors to produce electronic analogs of the soma and axon of a neuron, with "leaky integrate-and-fire" dynamics augmented by a signal gain on the output. Paired with non-volatile pseudo-memcapacitive synapses, a Hebbian-like learning mechanism is implemented in a capacitive switching network, leading to the observed associative learning. A prototypical fully integrated capacitive neural network is built and used to classify inputs of signals.

A novel true random number generator based on a stochastic diffusive memristor.

The intrinsic variability of switching behavior in memristors has been a major obstacle to their adoption as the next generation of universal memory. On the other hand, this natural stochasticity can be valuable for hardware security applications. Here we propose and demonstrate a novel true random number generator utilizing the stochastic delay time of threshold switching in a Ag:SiO2 diffusive memristor, which exhibits evident advantages in scalability, circuit complexity, and power consumption. The random bits generated by the diffusive memristor true random number generator pass all 15 NIST randomness tests without any post-processing, a first for memristive-switching true random number generators. Based on nanoparticle dynamic simulation and analytical estimates, we attribute the stochasticity in delay time to the probabilistic process by which Ag particles detach from a Ag reservoir. This work paves the way for memristors in hardware security applications for the era of the Internet of Things.Memristors can switch between high and low electrical-resistance states, but the switching behaviour can be unpredictable. Here, the authors harness this unpredictability to develop a memristor-based true random number generator that uses the stochastic delay time of threshold switching.