Effect of silicide/silicon hetero-junction structure on thermal conductivity and Seebeck coefficient.

We fabricated a thermoelectric device with a silicide/silicon laminated hetero-structure by using RF sputtering and rapid thermal annealing. The device was observed to have Ohmic characteristics by I-V measurement. The temperature differences and Seebeck coefficients of the proposed silicide/silicon laminated and bulk structure were measured. The laminated thermoelectric device shows suppression of heat flow from the hot to cold side. This is supported by the theory that the atomic mass difference between silicide and silicon creates a scattering center for phonons. The major impact of our work is that phonon transmission is suppressed at the interface between silicide and silicon without degrading electrical conductivity. The estimated thermal conductivity of the 3-layer laminated device is 126.2 +/- 3.7 W/m. K. Thus, by using the 3-layer laminated structure, thermal conductivity is reduced by around 16% compared to bulk silicon. However, the Seebeck coefficient of the thermoelectric device is degraded compared to that of bulk silicon. It is understood that electrical conductivity is improved by using silicide as a scattering center.

Fabrication of ordered hollow ZnO-NiO oxide arrays.

We have combined colloidal templating and pulsed laser deposition (PLD) to fabricate arrays of ordered two-dimensional hollow ZnO-NiO mixed oxides. The underlying principle involved in producing colloidal templates by a spin-coating method has been investigated with the use of radial distribution functions. To deposit mixed oxide in a facile manner, we have designed and fabricated a novel PLD target, which has an alternating sequence of pie-shaped ZnO and NiO pieces. Structural characterizations reveal a surface morphology of protruding nano-crystallites, which consist of würtzite ZnO and rock salt NiO. The electrical properties have been discussed from the viewpoint of junction effects.

Versatile porous graphene flakes derived from alkali metal carbonates using an ultrafast and sulfuric acid-free solid-state oxidation reaction.

Herein, we report on an unprecedented synthetic method for single-layered GO that takes just a few tens of minutes. This rationally designed solid-state oxidation based on alkali metal carbonates (Li2CO3, Na2CO3, K2CO3) involves a molten salt reaction, which enables the effective exfoliation and oxidation of graphene layers without using H2SO4 and KMnO4. The advantage of this approach is not only the ability to avoid the introduction of strong acid reactants in the reaction process, but this approach also leads to a 4.2 times larger specific surface area than conventional GO. For these reasons, we anticipate that this green, safe, fast and effective approach enables practical applications in graphene-based energy storage and light-absorbing black materials.

Noncollinear correlated photon pair source in the 1550 nm telecommunication band.

We present a source of noncollinear correlated photon pairs in the standard 1550 nm telecommunication band. They are generated by a spontaneous parametric down-conversion process and emitted in a cone because of type-I noncollinear phase matching. Within the band, the source gives a completely flexible choice of the frequencies of the photon pairs, and correlation properties related to spatial momentum as well as energy and time can easily be utilized.We characterize the source by measuring the spatial intensity distribution of the down-converted light and by performing coincidence counting.

Silicide/Silicon Hetero-Junction Structure for Thermoelectric Applications.

We fabricated silicide/silicon hetero-junction structured thermoelectric device by CMOS process for the reduction of thermal conductivity with the scatterings of phonons at silicide/silicon interfaces. Electrical conductivities, Seebeck coefficients, power factors, and temperature differences are evaluated using the steady state analysis method. Platinum silicide/silicon multilayered structure showed an enhanced Seebeck coefficient and power factor characteristics, which was considered for p-leg element. Also, erbium silicide/silicon structure showed an enhanced Seebeck coefficient, which was considered for an n-leg element. Silicide/silicon multilayered structure is promising for thermoelectric applications by reducing thermal conductivity with an enhanced Seebeck coefficient. However, because of the high thermal conductivity of the silicon packing during thermal gradient is not a problem any temperature difference. Therefore, requires more testing and analysis in order to overcome this problem. Thermoelectric generators are devices that based on the Seebeck effect, convert temperature differences into electrical energy. Although thermoelectric phenomena have been used for heating and cooling applications quite extensively, it is only in recent years that interest has increased in energy generation.

Evaluation of Seebeck coefficients in n- and p-type silicon nanowires fabricated by complementary metal-oxide-semiconductor technology.

Silicon-based thermoelectric nanowires were fabricated by using complementary metal-oxide-semiconductor (CMOS) technology. 50 nm width n- and p-type silicon nanowires (SiNWs) were manufactured using a conventional photolithography method on 8 inch silicon wafer. For the evaluation of the Seebeck coefficients of the silicon nanowires, heater and temperature sensor embedded test patterns were fabricated. Moreover, for the elimination of electrical and thermal contact resistance issues, the SiNWs, heater and temperature sensors were fabricated monolithically using a CMOS process. For validation of the temperature measurement by an electrical method, scanning thermal microscopy analysis was carried out. The highest Seebeck coefficients were - 169.97 µV K(-1) and 152.82 µV K(-1) and the highest power factors were 2.77 mW m(-1) K(-2) and 0.65 mW m(-1) K(-2) for n- and p-type SiNWs, respectively, in the temperature range from 200 to 300 K. The larger power factor value for n-type SiNW was due to the higher electrical conductivity. The total Seebeck coefficient and total power factor for the n- and p-leg unit device were 157.66 µV K(-1) and 9.30 mW m(-1) K(-2) at 300 K, respectively.

The Characteristics of Seebeck Coefficient in Silicon Nanowires Manufactured by CMOS Compatible Process.

Silicon nanowires are patterned down to 30 nm using complementary metal-oxide-semiconductor (CMOS) compatible process. The electrical conductivities of n-/p-leg nanowires are extracted with the variation of width. Using this structure, Seebeck coefficients are measured. The obtained maximum Seebeck coefficient values are 122 µV/K for p-leg and -94 µV/K for n-leg. The maximum attainable power factor is 0.74 mW/m K(2) at room temperature.