Your browser doesn't support javascript.
loading
A quantitative approach for trap analysis between Al0.25Ga0.75N and GaN in high electron mobility transistors.
Amir, Walid; Shin, Ju-Won; Shin, Ki-Yong; Kim, Jae-Moo; Cho, Chu-Young; Park, Kyung-Ho; Hoshi, Takuya; Tsutsumi, Takuya; Sugiyama, Hiroki; Matsuzaki, Hideaki; Kim, Tae-Woo.
Afiliación
  • Amir W; Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Ulsan, 44610, Korea.
  • Shin JW; Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Ulsan, 44610, Korea.
  • Shin KY; Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Ulsan, 44610, Korea.
  • Kim JM; Korea Advanced Nano Fab Center, Suwon, Gyeonggi-do, 16229, Korea.
  • Cho CY; Korea Advanced Nano Fab Center, Suwon, Gyeonggi-do, 16229, Korea.
  • Park KH; Korea Advanced Nano Fab Center, Suwon, Gyeonggi-do, 16229, Korea.
  • Hoshi T; NTT Device Technology Laboratories, NTT Corporation, Atsugi, Kanagawa, 243-0198, Japan.
  • Tsutsumi T; NTT Device Technology Laboratories, NTT Corporation, Atsugi, Kanagawa, 243-0198, Japan.
  • Sugiyama H; NTT Device Technology Laboratories, NTT Corporation, Atsugi, Kanagawa, 243-0198, Japan.
  • Matsuzaki H; NTT Device Technology Laboratories, NTT Corporation, Atsugi, Kanagawa, 243-0198, Japan.
  • Kim TW; Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Ulsan, 44610, Korea. twkim78@ulsan.ac.kr.
Sci Rep ; 11(1): 22401, 2021 11 17.
Article en En | MEDLINE | ID: mdl-34789786
ABSTRACT
The characteristics of traps between the Al0.25Ga0.75N barrier and the GaN channel layer in a high-electron-mobility-transistors (HEMTs) were investigated. The interface traps at the Al0.25Ga0.75N/GaN interface as well as the border traps were experimentally analyzed because the Al0.25Ga0.75N barrier layer functions as a dielectric owing to its high dielectric constant. The interface trap density Dit and border trap density Nbt were extracted from a long-channel field-effect transistor (FET), conventionally known as a FATFET structure, via frequency-dependent capacitance-voltage (C-V) and conductance-voltage (G-V) measurements. The minimum Dit value extracted by the conventional conductance method was 2.5 × 1012 cm-2·eV-1, which agreed well with the actual transistor subthreshold swing of around 142 mV·dec-1. The border trap density Nbt was also extracted from the frequency-dependent C-V characteristics using the distributed circuit model, and the extracted value was 1.5 × 1019 cm-3·eV-1. Low-frequency (1/f) noise measurement provided a clearer picture of the trapping-detrapping phenomena in the Al0.25Ga0.75N layer. The value of the border trap density extracted using the carrier-number-fluctuation (CNF) model was 1.3 × 1019 cm-3·eV-1, which is of a similar level to the extracted value from the distributed circuit model.

Texto completo: 1 Colección: 01-internacional Banco de datos: MEDLINE Tipo de estudio: Prognostic_studies Idioma: En Revista: Sci Rep Año: 2021 Tipo del documento: Article

Texto completo: 1 Colección: 01-internacional Banco de datos: MEDLINE Tipo de estudio: Prognostic_studies Idioma: En Revista: Sci Rep Año: 2021 Tipo del documento: Article