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Interface Optimization and Transport Modulation of Sm2O3/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer.
Lu, Jinyu; He, Gang; Yan, Jin; Dai, Zhenxiang; Zheng, Ganhong; Jiang, Shanshan; Qiao, Lesheng; Gao, Qian; Fang, Zebo.
Afiliação
  • Lu J; School of Materials Science and Engineering, Anhui University, Hefei 230601, China.
  • He G; School of Materials Science and Engineering, Anhui University, Hefei 230601, China.
  • Yan J; School of Materials Science and Engineering, Anhui University, Hefei 230601, China.
  • Dai Z; School of Physics and Optoelectronics Engineering, Anhui University, Hefei 230601, China.
  • Zheng G; School of Materials Science and Engineering, Anhui University, Hefei 230601, China.
  • Jiang S; School of Integration Circuits, Anhui University, Hefei 230601, China.
  • Qiao L; School of Materials Science and Engineering, Anhui University, Hefei 230601, China.
  • Gao Q; School of Materials Science and Engineering, Anhui University, Hefei 230601, China.
  • Fang Z; School of Mathematical Information, Shaoxing University, Shaoxing 312000, China.
Nanomaterials (Basel) ; 11(12)2021 Dec 19.
Article em En | MEDLINE | ID: mdl-34947792
ABSTRACT
In this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm2O3/InP gate stacks have been investigated systematically. Based on X-ray photoelectron spectroscopy (XPS) measurements, it can be noted that ALD-derived Al2O3 interface passivation layer significantly prevents the appearance of substrate diffusion oxides and substantially optimizes gate dielectric performance. The leakage current experimental results confirm that the Sm2O3/Al2O3/InP stacked gate dielectric structure exhibits a lower leakage current density than the other samples, reaching a value of 2.87 × 10-6 A/cm2. In addition, conductivity analysis shows that high-quality metal oxide semiconductor capacitors based on Sm2O3/Al2O3/InP gate stacks have the lowest interfacial density of states (Dit) value of 1.05 × 1013 cm-2 eV-1. The conduction mechanisms of the InP-based MOS capacitors at low temperatures are not yet known, and to further explore the electron transport in InP-based MOS capacitors with different stacked gate dielectric structures, we placed samples for leakage current measurements at low varying temperatures (77-227 K). Based on the measurement results, Sm2O3/Al2O3/InP stacked gate dielectric is a promising candidate for InP-based metal oxide semiconductor field-effect-transistor devices (MOSFET) in the future.
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Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Idioma: En Revista: Nanomaterials (Basel) Ano de publicação: 2021 Tipo de documento: Article País de afiliação: China

Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Idioma: En Revista: Nanomaterials (Basel) Ano de publicação: 2021 Tipo de documento: Article País de afiliação: China