Three-dimensional integration of nanotechnologies for computing and data storage on a single chip.

Shulaker, Max M; Hills, Gage; Park, Rebecca S; Howe, Roger T; Saraswat, Krishna; Wong, H-S Philip; Mitra, Subhasish

Shulaker, Max M; Hills, Gage; Park, Rebecca S; Howe, Roger T; Saraswat, Krishna; Wong, H-S Philip; Mitra, Subhasish.

Afiliación

Shulaker MM; Department of Electrical Engineering, Stanford University, Stanford, California, USA.
Hills G; Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA.
Park RS; Department of Electrical Engineering, Stanford University, Stanford, California, USA.
Howe RT; Department of Electrical Engineering, Stanford University, Stanford, California, USA.
Saraswat K; Department of Electrical Engineering, Stanford University, Stanford, California, USA.
Wong HP; Department of Electrical Engineering, Stanford University, Stanford, California, USA.
Mitra S; Department of Electrical Engineering, Stanford University, Stanford, California, USA.

Nature ; 547(7661): 74-78, 2017 07 05.

Article en En | MEDLINE | ID: mdl-28682331

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Texto completo: 1 Banco de datos: MEDLINE Idioma: En Revista: Nature Año: 2017 Tipo del documento: Article País de afiliación: Estados Unidos

Texto completo

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Texto completo: 1 Banco de datos: MEDLINE Idioma: En Revista: Nature Año: 2017 Tipo del documento: Article País de afiliación: Estados Unidos