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Highly parallel stateful Boolean logic gates based on aluminum-doped self-rectifying memristors in a vertical crossbar array structure.
Park, Taegyun; Kim, Seung Soo; Lee, Byeol Jun; Park, Tae Won; Kim, Hae Jin; Hwang, Cheol Seong.
Afiliación
  • Park T; Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul 08826, Republic of Korea. cheolsh@snu.ac.kr.
  • Kim SS; Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul 08826, Republic of Korea. cheolsh@snu.ac.kr.
  • Lee BJ; Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul 08826, Republic of Korea. cheolsh@snu.ac.kr.
  • Park TW; Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul 08826, Republic of Korea. cheolsh@snu.ac.kr.
  • Kim HJ; Department of Materials Science and Engineering, Myongji University, Yongin, 17058, Republic of Korea. haejinkim@mju.ac.kr.
  • Hwang CS; Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul 08826, Republic of Korea. cheolsh@snu.ac.kr.
Nanoscale ; 15(13): 6387-6395, 2023 Mar 30.
Article en En | MEDLINE | ID: mdl-36919469
The self-rectifying memristor with electronic bipolar resistive switching shows electroforming-free, highly rectifying properties and low operating power. Furthermore, configuring the memristors in a vertical array structure provides a higher memory density than in a planar array structure. These combined advantages can be exploited in in-memory computing, which may provide a new and efficient stateful logic gate with high parallelism compared to the conventional stateful logic gates in the planar array structure. The different switching mechanism compared to the previous logic gates based on filamentary-type switching is explained and exploited to realize the AND and OR Boolean logic gates. Since the AND and OR logic functions are the basic operations of sum-of-product (SoP) and product-of-sum (PoS) expressions, any canonical expression for Boolean logic can be implemented in the vertical crossbar array (CBA). Accordingly, the composite logic gate, such as an exclusive OR operation, is demonstrated. In addition, the implementation of the memristive priority encoder is proposed using parallel logic gates. Although the switching speed should be improved in further work, a higher parallelism with a larger number of layers in the vertical array structure can mitigate the low operation speed issue.

Texto completo: 1 Banco de datos: MEDLINE Idioma: En Revista: Nanoscale Año: 2023 Tipo del documento: Article

Texto completo: 1 Banco de datos: MEDLINE Idioma: En Revista: Nanoscale Año: 2023 Tipo del documento: Article