Your browser doesn't support javascript.
loading
Ultrathin Crystalline Silicon Nano and Micro Membranes with High Areal Density for Low-Cost Flexible Electronics.
Lee, Ju Young; Shin, Jongwoon; Kim, Kyubeen; Ju, Jeong Eun; Dutta, Ankan; Kim, Tae Soo; Cho, Young Uk; Kim, Taemin; Hu, Luhing; Min, Won Kyung; Jung, Hyun-Suh; Park, Young Sun; Won, Sang Min; Yeo, Woon-Hong; Moon, Jooho; Khang, Dahl-Young; Kim, Hyun Jae; Ahn, Jong-Hyun; Cheng, Huanyu; Yu, Ki Jun; Rogers, John A.
Afiliación
  • Lee JY; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Shin J; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Kim K; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Ju JE; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Dutta A; Department of Engineering Science and Mechanics, The Pennsylvania State University, University Park, PA, 16802, USA.
  • Kim TS; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Cho YU; Center for Opto-Electronic Materials and Devices, Post-Silicon Semiconductor Institute, Korea Institute of Science and Technology (KIST), Seongbuk-gu, Seoul, 02792, South Korea.
  • Kim T; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Hu L; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Min WK; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Jung HS; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
  • Park YS; Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seoul, 03722, Republic of Korea.
  • Won SM; Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seoul, 03722, Republic of Korea.
  • Yeo WH; Department of Electrical and Computer Engineering, Sungkyunkwan University, Seongbuk-gu, Suwon, 16419, Republic of Korea.
  • Moon J; George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA, 30332, USA.
  • Khang DY; IEN Center for Human-Centric Interfaces and Engineering at the Institute for Electronics and Nanotechnology, Georgia Institute of Technology, Atlanta, GA, 30332, USA.
  • Kim HJ; Wallace H. Coulter Department of Biomedical Engineering, Parker H. Petit Institute for Bioengineering and Biosciences, Georgia Institute of Technology, Atlanta, GA, 30332, USA.
  • Ahn JH; Institute for Materials, Neural Engineering Center, Institute for Robotics and Intelligent Machines, Georgia Institute of Technology, Atlanta, GA, 30332, USA.
  • Cheng H; Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seoul, 03722, Republic of Korea.
  • Yu KJ; Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seoul, 03722, Republic of Korea.
  • Rogers JA; School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemungu, Seoul, 03722, Republic of Korea.
Small ; 19(39): e2302597, 2023 Sep.
Article en En | MEDLINE | ID: mdl-37246255
ABSTRACT
Ultrathin crystalline silicon is widely used as an active material for high-performance, flexible, and stretchable electronics, from simple passive and active components to complex integrated circuits, due to its excellent electrical and mechanical properties. However, in contrast to conventional silicon wafer-based devices, ultrathin crystalline silicon-based electronics require an expensive and rather complicated fabrication process. Although silicon-on-insulator (SOI) wafers are commonly used to obtain a single layer of crystalline silicon, they are costly and difficult to process. Therefore, as an alternative to SOI wafers-based thin layers, here, a simple transfer method is proposed for printing ultrathin multiple crystalline silicon sheets with thicknesses between 300 nm to 13 µm and high areal density (>90%) from a single mother wafer. Theoretically, the silicon nano/micro membrane can be generated until the mother wafer is completely consumed. In addition, the electronic applications of silicon membranes are successfully demonstrated through the fabrication of a flexible solar cell and flexible NMOS transistor arrays.
Palabras clave

Texto completo: 1 Banco de datos: MEDLINE Tipo de estudio: Health_economic_evaluation Idioma: En Revista: Small Asunto de la revista: ENGENHARIA BIOMEDICA Año: 2023 Tipo del documento: Article

Texto completo: 1 Banco de datos: MEDLINE Tipo de estudio: Health_economic_evaluation Idioma: En Revista: Small Asunto de la revista: ENGENHARIA BIOMEDICA Año: 2023 Tipo del documento: Article