ABSTRACT
In organic electronics, local crystalline order is of critical importance for the charge transport. Grain boundaries between molecularly ordered domains are generally known to hamper or completely suppress charge transfer and detailed knowledge of the local electronic nature is critical for future minimization of such malicious defects. However, grain boundaries are typically hidden within the bulk film and consequently escape observation or investigation. Here, a minimal model system in form of monolayer-thin films with sub-nm roughness of a prototypical n-type organic semiconductor is presented. Since these films consist of large crystalline areas, the detailed energy landscape at single grain boundaries can be studied using Kelvin probe force microscopy. By controlling the charge-carrier density in the films electrostatically, the impact of the grain boundaries on charge transport in organic devices is modeled. First, two distinct types of grain boundaries are identified, namely energetic barriers and valleys, which can coexist within the same thin film. Their absolute height is found to be especially pronounced at charge-carrier densities below 1012 cm- 2 -the regime at which organic solar cells and light emitting diodes typically operate. Finally, processing conditions by which the type or energetic height of grain boundaries can be controlled are identified.
ABSTRACT
To take full advantage of recent and anticipated improvements in the performance of organic semiconductors employed in organic transistors, the high contact resistance arising at the interfaces between the organic semiconductor and the source and drain contacts must be reduced significantly. To date, only a small portion of the accumulated research on organic thin-film transistors (TFTs) has reported channel-width-normalized contact resistances below 100 Ωcm, well above what is regularly demonstrated in transistors based on inorganic semiconductors. A closer look at these cases and the relevant literature strongly suggests that the most significant factor leading to the lowest contact resistances in organic TFTs so far has been the control of the thin-film morphology of the organic semiconductor. By contrast, approaches aimed at increasing the charge-carrier density and/or reducing the intrinsic Schottky barrier height have so far played a relatively minor role in achieving the lowest contact resistances. Herein, the possible explanations for these observations are explored, including the prevalence of Fermi-level pinning and the difficulties in forming optimized interfaces with organic semiconductors. An overview of the research on these topics is provided, and potential device-engineering solutions are discussed based on recent advancements in the theoretical and experimental work on both organic and inorganic semiconductors.
ABSTRACT
Direct-write electron-beam lithography has been used to fabricate low-voltage p-channel and n-channel organic thin-film transistors with channel lengths as small as 200 nm and gate-to-contact overlaps as small as 100 nm on glass and on flexible transparent polymeric substrates. The p-channel transistors have on/off current ratios as large as 4 × 109 and subthreshold swings as small as 70 mV/decade, and the n-channel transistors have on/off ratios up to 108 and subthreshold swings as low as 80 mV/decade. These are the largest on/off current ratios reported to date for nanoscale organic transistors. Inverters based on two p-channel transistors with a channel length of 200 nm and gate-to-contact overlaps of 100 nm display characteristic switching-delay time constants between 80 and 40 ns at supply voltages between 1 and 2 V, corresponding to a supply voltage-normalized frequency of about 6 MHz/V. This is the highest voltage-normalized dynamic performance reported to date for organic transistors fabricated by maskless lithography.
ABSTRACT
The primary driver for the development of organic thin-film transistors (TFTs) over the past few decades has been the prospect of electronics applications on unconventional substrates requiring low-temperature processing. A key requirement for many such applications is high-frequency switching or amplification at the low operating voltages provided by lithium-ion batteries (~3 V). To date, however, most organic-TFT technologies show limited dynamic performance unless high operating voltages are applied to mitigate high contact resistances and large parasitic capacitances. Here, we present flexible low-voltage organic TFTs with record static and dynamic performance, including contact resistance as small as 10 Ω·cm, on/off current ratios as large as 1010, subthreshold swing as small as 59 mV/decade, signal delays below 80 ns in inverters and ring oscillators, and transit frequencies as high as 21 MHz, all while using an inverted coplanar TFT structure that can be readily adapted to industry-standard lithographic techniques.
ABSTRACT
The contact resistance in organic thin-film transistors (TFTs) is the limiting factor in the development of high-frequency organic TFTs. In devices fabricated in the inverted (bottom-gate) device architecture, staggered (top-contact) organic TFTs have usually shown or are predicted to show lower contact resistance than coplanar (bottom-contact) organic TFTs. However, through comparison of organic TFTs with different gate-dielectric thicknesses based on the small-molecule organic semiconductor 2,9-diphenyl-dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene, we show the potential for bottom-contact TFTs to have lower contact resistance than top-contact TFTs, provided the gate dielectric is sufficiently thin and an interface layer such as pentafluorobenzenethiol is used to treat the surface of the source and drain contacts. We demonstrate bottom-contact TFTs fabricated on flexible plastic substrates with record-low contact resistance (29 Ωcm), record subthreshold swing (62 mV/decade), and signal-propagation delays in 11-stage unipolar ring oscillators as short as 138 ns per stage, all at operating voltages of about 3 V.
ABSTRACT
Development of thin-film transparent conductors (TC) based on percolating networks of metal nanowires has leaped forward in recent years, owing to the improvement of nanowire synthetic methods and modeling efforts by several research groups. While silver nanowires are the first commercially viable iteration of this technology, systems based on copper nanowires are not far behind. Here we present an analysis of TCs composed of copper nanowire networks on sheets of polyethylene terephthalate that have been treated with various oxide-removing post treatments to improve conductivity. A pseudo-2D rod network modeling approach has been modified to include lognormal distributions in length that more closely reflect experimental data collected from the nanowire TCs. In our analysis, we find that the copper nanowire TCs are capable of achieving comparable electrical performance to silver nanowire TCs with similar dimensions. Lastly, we present a method for more accurately determining the nanowire area coverage in a TC over a large area using Rutherford Backscattering Spectrometry (RBS) to directly measure the metal content in the TCs. These developments will aid research and industry groups alike in the characterization of nanowire based TCs.