Ultrasensitive 3D Stacked Silicon Nanosheet Field-Effect Transistor Biosensor with Overcoming Debye Shielding Effect for Detection of DNA.

Silicon nanowire field effect (SiNW-FET) biosensors have been successfully used in the detection of nucleic acids, proteins and other molecules owing to their advantages of ultra-high sensitivity, high specificity, and label-free and immediate response. However, the presence of the Debye shielding effect in semiconductor devices severely reduces their detection sensitivity. In this paper, a three-dimensional stacked silicon nanosheet FET (3D-SiNS-FET) biosensor was studied for the high-sensitivity detection of nucleic acids. Based on the mainstream Gate-All-Around (GAA) fenestration process, a three-dimensional stacked structure with an 8 nm cavity spacing was designed and prepared, allowing modification of probe molecules within the stacked cavities. Furthermore, the advantage of the three-dimensional space can realize the upper and lower complementary detection, which can overcome the Debye shielding effect and realize high-sensitivity Point of Care Testing (POCT) at high ionic strength. The experimental results show that the minimum detection limit for 12-base DNA (4 nM) at 1 × PBS is less than 10 zM, and at a high concentration of 1 µM DNA, the sensitivity of the 3D-SiNS-FET is approximately 10 times higher than that of the planar devices. This indicates that our device provides distinct advantages for detection, showing promise for future biosensor applications in clinical settings.

Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications.

In this paper, the poly-Si nanowire (NW) field-effect transistor (FET) sensor arrays were fabricated by adopting low-temperature annealing (600 °C/30 s) and feasible spacer image transfer (SIT) processes for future monolithic three-dimensional integrated circuits (3D-ICs) applications. Compared with other fabrication methods of poly-Si NW sensors, the SIT process exhibits the characteristics of highly uniform poly-Si NW arrays with well-controlled morphology (about 25 nm in width and 35 nm in length). Conventional metal silicide and implantation techniques were introduced to reduce the parasitic resistance of source and drain (SD) and improve the conductivity. Therefore, the obtained sensors exhibit >106 switching ratios and 965 mV/dec subthreshold swing (SS), which exhibits similar results compared with that of SOI Si NW sensors. However, the poly-Si NW FET sensors show the Vth shift as high as about 178 ± 1 mV/pH, which is five times larger than that of the SOI Si NW sensors. The fabricated poly-Si NW sensors with 600 °C/30 s processing temperature and good device performance provide feasibility for future monolithic three-dimensional integrated circuit (3D-IC) applications.