Reconfigurable Compute-In-Memory on Field-Programmable Ferroelectric Diodes.

The deluge of sensors and data generating devices has driven a paradigm shift in modern computing from arithmetic-logic centric to data-centric processing. Data-centric processing require innovations at the device level to enable novel compute-in-memory (CIM) operations. A key challenge in the construction of CIM architectures is the conflicting trade-off between the performance and their flexibility for various essential data operations. Here, we present a transistor-free CIM architecture that permits storage, search, and neural network operations on sub-50 nm thick Aluminum Scandium Nitride ferroelectric diodes (FeDs). Our circuit designs and devices can be directly integrated on top of Silicon microprocessors in a scalable process. By leveraging the field-programmability, nonvolatility, and nonlinearity of FeDs, search operations are demonstrated with a cell footprint <0.12 µm2 when projected onto 45 nm node technology. We further demonstrate neural network operations with 4-bit operation using FeDs. Our results highlight FeDs as candidates for efficient and multifunctional CIM platforms.

Scalable CMOS back-end-of-line-compatible AlScN/two-dimensional channel ferroelectric field-effect transistors.

Three-dimensional monolithic integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrent with enhanced energy efficiency in big data applications such as artificial intelligence. Despite decades of efforts, there remains an urgent need for reliable, compact, fast, energy-efficient and scalable memory devices. Ferroelectric field-effect transistors (FE-FETs) are a promising candidate, but requisite scalability and performance in a back-end-of-line process have proven challenging. Here we present back-end-of-line-compatible FE-FETs using two-dimensional MoS2 channels and AlScN ferroelectric materials, all grown via wafer-scalable processes. A large array of FE-FETs with memory windows larger than 7.8 V, ON/OFF ratios greater than 107 and ON-current density greater than 250 µA um-1, all at ~80 nm channel length are demonstrated. The FE-FETs show stable retention up to 10 years by extension, and endurance greater than 104 cycles in addition to 4-bit pulse-programmable memory features, thereby opening a path towards the three-dimensional heterointegration of a two-dimensional semiconductor memory with silicon complementary metal-oxide-semiconductor logic.