A Digital-Analog Hybrid System-on-Chip for Capacitive Sensor Measurement and Control.

Sensors based on capacitance detection are common in the field of inertial measurement and have the potential for miniaturization and low power consumption. In order to control and process such sensors, a novel digital-analog hybrid system-on-chip (SoC) is designed and implemented. The system includes a capacitor to voltage (C/V) conversion circuit and a band-pass sigma-delta modulator (BPSDM) as the analog-to-digital converter (ADC). The digital signal is processed by the dedicated circuit module based on the least mean square error demodulation (LMSD) algorithm on the chip. The low-power Cortex-M3 processor supports software implementation of control algorithms and circuit parameter configuration. The control signal is output through a digital BPSDM. The chip was taped out under SMIC 180 nm Complementary Metal Oxide Semiconductor (CMOS) technology and tested for performance. The result shows that the maximum operating frequency of the chip is 105 MHz. The total area is 77.43 mm2. When the system clock is set to 51.2 MHz, the static power consumption and dynamic power consumption of the digital system are 18 mW and 54 mW respectively.

Exploration and Research of Human Identification Scheme Based on Inertial Data.

The identification work based on inertial data is not limited by space, and has high flexibility and concealment. Previous research has shown that inertial data contains information related to behavior categories. This article discusses whether inertial data contains information related to human identity. The classification experiment, based on the neural network feature fitting function, achieves 98.17% accuracy on the test set, confirming that the inertial data can be used for human identification. The accuracy of the classification method without feature extraction on the test set is only 63.84%, which further indicates the need for extracting features related to human identity from the changes in inertial data. In addition, the research on classification accuracy based on statistical features discusses the effect of different feature extraction functions on the results. The article also discusses the dimensionality reduction processing and visualization results of the collected data and the extracted features, which helps to intuitively assess the existence of features and the quality of different feature extraction effects.

Design and Implementation of an On-Chip Low-Power and High-Flexibility System for Data Acquisition and Processing of an Inertial Measurement Unit.

For signal processing of a Micro-Electro-Mechanical System (MEMS) Inertial Measurement Unit (IMU), a digital-analog hybrid system-on-chip (SoC) with small area and low power consumption was designed and implemented in this paper. To increase the flexibility of the processing circuit, the designed SoC integrates a low-power processor and supports three startup or debugging modes for different application scenarios. An application-specific computing module and communication interface are designed in the circuit to meet the requirements of IMU signal processing. The configurable clock allows users to dynamically balance computing speed and power consumption in their applications. The chip was taped out under SMIC 180 nm CMOS technology and tested for performance. The results show that the chip's maximum running frequency is 105 MHz. The total area is 33.94 mm2. The dynamic and static power consumption are 0.65 mW/MHz and 0.30 mW/MHz, respectively. When the system clock is 25 MHz, the dynamic and static power consumption of the chip is 76 mW and 66 mW, and the dynamic and static power consumption of the FPGA level are 634 mW and 520 mW. The results verify the superiority of the application specific integrated circuit (ASIC) solution in terms of integration and low power consumption.

An Analog Interface Circuit for Capacitive Angle Encoder Based on a Capacitance Elimination Array and Synchronous Switch Demodulation Method.

This paper presents an analog interface application-specific integrated circuit (ASIC) for a capacitive angle encoder, which is widely used in control machine systems. The encoder consists of two parts: a sensitive structure and analog readout circuit. To realize miniaturization, low power consumption, and easy integration, an analog interface circuit including a DC capacitance elimination array and switch synchronous demodulation module was designed. The DC capacitance elimination array allows the measurement circuit to achieve a very high capacitance to voltage conversion ratio at a low supply voltage. Further, the switch synchronous demodulation module effectively removes the carrier signal and greatly reduces the sampling rate requirement of the analog-to-digital converter (ADC). The ASIC was designed and fabricated with standard 0.18 µm CMOS processing technology and integrated with the sensitive structure. An experiment was conducted to test and characterize the performance of the proposed analog interface circuit. The encoder measurement results showed a resolution of 0.01°, power consumption of 20 mW, and accuracy over the full absolute range of 0.1°, which indicates the great potential of the encoder for application in control machine systems.

Self-Calibration of Nonlinear Signal Model for Angular Position Sensors by Model-Based Automatic Search Algorithm.

This study proposes a novel model-based automatic search algorithm to realize the self-calibration of nonlinear signal model for angular position sensors. In some high-precision angular position sensors, nonlinearity of the signal model is the main source of errors and cannot be handled effectively. By constructing a signal flow network framework and by embedding a modeling search network, the parameters of the nonlinear signal model can be searched, and the calibration signal can be obtained. The convergence of the network search process was analyzed. The relationship between the optimization threshold and the convergence accuracy was also studied in simulations. Compared with the maximum angular error reduction to 47.42% after the calibration with simplified model that ignores signal nonlinearities, the proposed scheme was able to reduce this error to 0.0025% in simulations. By implementing the technique in a capacitive angular position sensor, the experimental results showed that the maximum angular error was reduced to 1.63% compared to a reduction of 86.02% achieved with the simplified model calibration. The effects of the search network order and layer number on the calibration accuracy were also analyzed, and the optimal parameters under experimental conditions were obtained. Correspondingly, the proposed scheme is able to handle calibration of nonlinear signal model and further improve sensor accuracy.

Self-Calibration of Angular Position Sensors by Signal Flow Networks.

Angle position sensors (APSs) usually require initial calibration to improve their accuracy. This article introduces a novel offline self-calibration scheme in which a signal flow network is employed to reduce the amplitude errors, direct-current (DC) offsets, and phase shift without requiring extra calibration instruments. In this approach, a signal flow network is firstly constructed to overcome the parametric coupling caused by the linearization model and to ensure the independence of the parameters. The model parameters are stored in the nodes of the network, and the intermediate variables are input into the optimization pipeline to overcome the local optimization problem. A deep learning algorithm is also used to improve the accuracy and speed of convergence to a global optimal solution. The results of simulations show that the proposed method can achieve a high identification accuracy with a relative parameter identification error less than 0.001‰. The practical effects were also verified by implementing the developed technique in a capacitive APS, and the experimental results demonstrate that the sensor error after signal calibration could be reduced to only 6.98%.