Room temperature observation of quantum confinement in single InAs nanowires.

Quantized conductance in nanowires can be observed at low temperature in transport measurements; however, the observation of sub-bands at room temperature is challenging due to temperature broadening. So far, conduction band splitting at room temperature has not been observed in III-V nanowires mainly due to the small energetic separations between the sub-bands. We report on the measurement of conduction sub-bands at room temperature, in single InAs nanowires, using Kelvin probe force microscopy. This method does not rely on charge transport but rather on measurement of the nanowire Fermi level position as carriers are injected into a single nanowire transistor. As there is no charge transport, electron scattering is no longer an issue, allowing the observation of the sub-bands at room temperature. We measure the energy of the sub-bands in nanowires with two different diameters, and obtain excellent agreement with theoretical calculations based on an empirical tight-binding model.

Surface chemical modification induces nanometer scale electron confinement in field effect device.

Design, preparation, and study of physicochemical properties of molecular assemblies are extremely challenging multidisciplinary research fields. Understanding the elementary principles that correlate these properties with molecular level of electronic behavior will enable us to control basic properties of molecule-based compounds as well as of classical semiconductors. In particular, chemical modification of field effect sensor devices where the metal gate is replaced with organic molecular layer, projects a crucial impact upon the electrical properties of the sensor. In these cases it is important to control the effects in order to ensure that the organic gate is optimized for sensing. Here we used fully depleted silicon-on-insulator (SOI) ion sensitive field effect transistor in order to analyze the projection of surface chemical modification on electronic performance. We suggest that surface activation and the application of 3-aminopropyltrimethoxysilane on top of the gate dielectric introduces negative charge at the Si/SiO(2) interface or/and on top of the gate dielectric and consequently an accumulation layer that confines the electrons to the bottom of the SOI channel. The transistor gain postmodification is characteristic of volume inversion, and therefore suggests that, following modification, the channel electrons are confined to SOI thickness of <10 nm. Finally, measurements of pH sensitivity indicate that the pH sensitivity post-UV/O(3) treatment is maximized suggesting that the negative charge is introduced during the activation process, where the density of the negatively charged amphoteric sites maximized.