Lithography and doping in strained Si towards atomically precise device fabrication.

We investigate the ability to introduce strain into atomic-scale silicon device fabrication by performing hydrogen lithography and creating electrically active phosphorus δ-doped silicon on strained silicon-on-insulator (sSOI) substrates. Lithographic patterns were obtained by selectively desorbing hydrogen atoms from a H resist layer adsorbed on a clean, atomically flat sSOI(001) surface with a scanning tunnelling microscope tip operating in ultra-high vacuum. The influence of the tip-to-sample bias on the lithographic process was investigated allowing us to pattern feature-sizes from several microns down to 1.3 nm. In parallel we have investigated the impact of strain on the electrical properties of P:Si δ-doped layers. Despite the presence of strain inducing surface variations in the silicon substrate we still achieve high carrier densities (>1.0 × 10(14) cm(-2)) with mobilities of ∼100 cm(2) V(-1) s(-1). These results open up the possibility of a scanning-probe lithography approach to the fabrication of strained atomic-scale devices in silicon.

Atomic-scale patterning of hydrogen terminated Ge(001) by scanning tunneling microscopy.

In this paper we demonstrate atomic-scale lithography on hydrogen terminated Ge(001). The lithographic patterns were obtained by selectively desorbing hydrogen atoms from a H resist layer adsorbed on a clean, atomically flat Ge(001) surface with a scanning tunneling microscope tip operating in ultra-high vacuum. The influence of the tip-to-sample bias on the lithographic process have been investigated. Lithographic patterns with feature-sizes from 200 to 1.8 nm have been achieved by varying the tip-to-sample bias. These results open up the possibility of a scanning-probe lithography approach to the fabrication of future atomic-scale devices in germanium.

Ohm's law survives to the atomic scale.

As silicon electronics approaches the atomic scale, interconnects and circuitry become comparable in size to the active device components. Maintaining low electrical resistivity at this scale is challenging because of the presence of confining surfaces and interfaces. We report on the fabrication of wires in silicon--only one atom tall and four atoms wide--with exceptionally low resistivity (~0.3 milliohm-centimeters) and the current-carrying capabilities of copper. By embedding phosphorus atoms within a silicon crystal with an average spacing of less than 1 nanometer, we achieved a diameter-independent resistivity, which demonstrates ohmic scaling to the atomic limit. Atomistic tight-binding calculations confirm the metallicity of these atomic-scale wires, which pave the way for single-atom device architectures for both classical and quantum information processing.