Investigation of Positive Bias Temperature Instability Characteristics of Fully Depleted Silicon on Insulator Tunneling Field Effect Transistor with High-k Dielectric Gate Stacks.

Song, Hyeong-Sub; Kim, So-Yeong; Lim, Dong-Hwan; Kwon, Sung-Kyu; Choi, Chang-Hwan; Lee, Ga-Won; Lee, Hi-Deok

Song, Hyeong-Sub; Kim, So-Yeong; Lim, Dong-Hwan; Kwon, Sung-Kyu; Choi, Chang-Hwan; Lee, Ga-Won; Lee, Hi-Deok.

Afiliación

Song HS; Department of Electronics Engineering, Chungnam National University, Daejeon, 34134, Korea.
Kim SY; Department of Electronics Engineering, Chungnam National University, Daejeon, 34134, Korea.
Lim DH; Division of Materials Science and Engineering, Hanyang University, Seoul, 04763, Korea.
Kwon SK; Department of Electronics Engineering, Chungnam National University, Daejeon, 34134, Korea.
Choi CH; Division of Materials Science and Engineering, Hanyang University, Seoul, 04763, Korea.
Lee GW; Department of Electronics Engineering, Chungnam National University, Daejeon, 34134, Korea.
Lee HD; Department of Electronics Engineering, Chungnam National University, Daejeon, 34134, Korea.

J Nanosci Nanotechnol ; 19(10): 6131-6134, 2019 Oct 01.

Article en En | MEDLINE | ID: mdl-31026922

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Texto completo: 1 Bases de datos: MEDLINE Idioma: En Revista: J Nanosci Nanotechnol Año: 2019 Tipo del documento: Article