Capacitorless One-Transistor Dynamic Random-Access Memory Based on Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor with Si/SiGe Heterojunction and Underlap Structure for Improvement of Sensing Margin and Retention Time.

We present a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on a Si/SiGe heterojunction double-gate MOSFET. In the proposed 1T-DRAM, the program process is based on band-to-band tunneling (BTBT) between gate 1 and gate 2 regions, and a sensing margin is defined by the amount of excess holes stored in the SiGe body region. Therefore, the sensing margin and retention time were affected by SiGe in the body region. The BTBT rate, enhanced by the small band-gap energy in SiGe, increased the sensing margin. The Si/SiGe heterojunction between the source/drain and body regions formed a potential barrier for hole carriers. The retention time was improved by suppressing the diffusion of hole carriers in the floating-body storage node. In addition, the retention characteristic was also enhanced by applying a gate underlap structure, which significantly reduced the electric field-induced recombination rate. The optimized device with a Si0.7Ge0.3 body and underlap length (Lunderlap) of 5 nm exhibited a high sensing margin of 6.16 µA/µm and long retention time of 131 ms at a high temperature of 358 K.