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Design Optimization of InGaAs/GaAsSb-Based P-Type Gate-All-Around Arch-Shaped Tunneling Field-Effect Transistor.
Kim, Bo Gyeong; Seo, Jae Hwa; Yoon, Young Jun; Cho, Min Su; Kang, In Man.
Afiliação
  • Kim BG; School of Electronics Engineering, Kyungpook National University, Daegu, 41566, South Korea.
  • Seo JH; School of Electronics Engineering, Kyungpook National University, Daegu, 41566, South Korea.
  • Yoon YJ; School of Electronics Engineering, Kyungpook National University, Daegu, 41566, South Korea.
  • Cho MS; School of Electronics Engineering, Kyungpook National University, Daegu, 41566, South Korea.
  • Kang IM; School of Electronics Engineering, Kyungpook National University, Daegu, 41566, South Korea.
J Nanosci Nanotechnol ; 19(10): 6762-6766, 2019 Oct 01.
Article em En | MEDLINE | ID: mdl-31027025
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Texto completo: 1 Bases de dados: MEDLINE Idioma: En Revista: J Nanosci Nanotechnol Ano de publicação: 2019 Tipo de documento: Article País de afiliação: Coréia do Sul
Texto completo
Adicionar na Minha BVS
Imprimir
XML
PubMed Links
Buscar no Google

Texto completo: 1 Bases de dados: MEDLINE Idioma: En Revista: J Nanosci Nanotechnol Ano de publicação: 2019 Tipo de documento: Article País de afiliação: Coréia do Sul