RESUMO
A blind frequency and phase search algorithm for joint frequency and phase recovery is introduced. The algorithm achieves low complexity due to processing in polar coordinates, which reduces the amount of multiplications. We show an implementation for real-time processing at 32 GBd on FPGA hardware. The hardware design allows for dynamic multi-format operation, where the format can be switched flexibly after each clock cycle (250 MHz, 128 Symbols) between 4QAM, 8QAM, and 16QAM. The performance of the algorithm is evaluated with respect to laser phase noise, carrier frequency offset, and carrier frequency offset drift. The effect of working with limited hardware resources is investigated. An FPGA implementation shows the feasibility of our carrier recovery algorithm with a negligible penalty when compared to a floating point simulation.