Ultra-compact quasi-true time delay for boosting wireless channel capacity.

Massive-data connectivity has driven the need for efficient, directed communications through beamforming arrays1-10. Delay elements are critical in any beamforming signal chain. However, these elements impose fundamental limits on size, channel capacity, power efficiency and effective isotropic radiated power11. Although passive phase shifters do not consume DC power, they suffer from narrow bandwidth, poor phase resolution and low power-handling capacity. They introduce a beam squint, in which different frequency components experience different time delays, blurring signals so that they cannot be resolved. This severely limits the data rate of the wireless link, that is, its channel capacity. Although true time delay (TTD) elements12 solve this problem and service a broad bandwidth, they comprise wavelength-scale transmission lines, making them prohibitively area-inefficient for modern semiconductor processes. Here we address this long-standing problem by introducing a quasi-true time delay (Q-TTD) that miniaturizes TTD elements and breaks fundamental channel-capacity limits of these wireless links. We demonstrate this mechanism for a microwave device implemented in a complementary metal-oxide-semiconductor (CMOS) technology. Key to shrinking the footprint is a reflective-type phase-shifting structure with 3D variable TTD reflectors within a sub-wavelength footprint. This achieves ultra-broadband phase tuning by using them to vary the length of the waveguide's path to ground. They produce a delay-to-area ratio that yields a substantially higher on-chip channel capacity compared with existing state-of-the-art methods. This component, when integrated in arrays, enables high-resolution imaging and low-squint beamforming for wideband communication, on-chip radar and other applications.

PCO-Based BLE Mesh Accelerator.

Bluetooth Low Energy (BLE) mesh networks enable diverse communication for the Internet of Things (IoT). However, existing BLE mesh implementations cannot simultaneously achieve low-power operation, symmetrical communication, and scalability. A major limitation of mesh networks is the inability of the BLE stack to handle network-scalable time synchronization. Pulse-coupled oscillators (PCOs) have been studied extensively and are able to achieve fast and reliable synchronization across a range of applications and network topologies. This paper presents a lightweight physical (PHY) layer accelerator to the BLE stack that enables scalable synchronization command with a PCO. The accelerator is a fully digital solution that can be synthesized with only the standard cells available in any silicon technology. This paper provides a detailed analysis of PCO-based BLE mesh networks and explores per-node system-level requirements. Finally, the analytical results are validated with measurements of a custom radio node based on the ubiquitous AD9364 transceiver.

A Bidirectional-Current CMOS Potentiostat for Fast-Scan Cyclic Voltammetry Detector Arrays.

A potentiostat circuit for the application of bipolar electrode voltages and detection of bidirectional currents using a microelectrode array is presented. The potentiostat operates as a regulated-cascode amplifier for positive input currents, and as an active-input regulated-cascode mirror for negative input currents. This topology enables constant-potential amperometry and fast-scan cyclic voltammetry (FSCV) at microelectrode arrays for parallel recording of quantal release events, electrode impedance characterization, and high-throughput drug screening. A 64-channel FSCV detector array, fabricated in a 0.5-$\mu$m, 5-V CMOS process, is also demonstrated. Each detector occupies an area of 45  $\mu$m $\times$ 30 $\mu$m and consists of only 14 transistors and a 50-fF integrating capacitor. The system was validated using prerecorded input stimuli from actual FSCV measurements at a carbon-fiber microelectrode.

A Wireless FSCV Monitoring IC With Analog Background Subtraction and UWB Telemetry.

A 30-µW wireless fast-scan cyclic voltammetry monitoring integrated circuit for ultra-wideband (UWB) transmission of dopamine release events in freely-behaving small animals is presented. On-chip integration of analog background subtraction and UWB telemetry yields a 32-fold increase in resolution versus standard Nyquist-rate conversion alone, near a four-fold decrease in the volume of uplink data versus single-bit, third-order, delta-sigma modulation, and more than a 20-fold reduction in transmit power versus narrowband transmission for low data rates. The 1.5- mm(2) chip, which was fabricated in 65-nm CMOS technology, consists of a low-noise potentiostat frontend, a two-step analog-to-digital converter (ADC), and an impulse-radio UWB transmitter (TX). The duty-cycled frontend and ADC/UWB-TX blocks draw 4 µA and 15 µA from 3-V and 1.2-V supplies, respectively. The chip achieves an input-referred current noise of 92 pA(rms) and an input current range of ±430 nA at a conversion rate of 10 kHz. The packaged device operates from a 3-V coin-cell battery, measures 4.7 × 1.9 cm(2), weighs 4.3 g (including the battery and antenna), and can be carried by small animals. The system was validated by wirelessly recording flow-injection of dopamine with concentrations in the range of 250 nM to 1 µM with a carbon-fiber microelectrode (CFM) using 300-V/s FSCV.

Wide temperature range operation of micrometer-scale silicon electro-optic modulators.

We demonstrate high bit rate electro-optic modulation in a resonant micrometer-scale silicon modulator over an ambient temperature range of 15 K. We show that low bit error rates can be achieved by varying the bias current through the device to thermally counteract the ambient temperature changes. Robustness in the presence of thermal variations can enable a wide variety of applications for dense on chip electronic photonic integration.

Analysis of intrachip electrical and optical fanout.

We examine the benefits of electrical isolation in intrachip optical signaling. We calculate the delay and energy metrics of an optical interconnect with fanout driving an electrical load. By examining fanout and including load drivers into delay equations, we make a shift from the general trend of looking at optical interconnects as a replacement for long parasitic wires. Our calculations show that optical fanout provides a large improvement in an Etau2 (energy delay squared) metric and improves performance even at very short intrachip distances. The break-even length corresponds to the wiring length of 250 minimum-size inverters that are compactly laid out. These results provide a compelling reason to further examine the implementation of optical interconnects.