RESUMO
Here a solution for a Microchip Health Monitoring (MHM) system using MTOL (Multi-Temperature Operational Life) reliability testing assessment data is proposed. The module monitors frequency degradation over time compared to lab tested data. Since trends in performance degradation in recently developed devices have transitioned from multiple failure mechanisms to a single dominant failure mechanism, development of the monitor is greatly simplified. The monitor uses a novel circuit customized to deliver optimum accuracy by combining the concepts of ring oscillator (RO) and phase locked loop (PLL) circuits. The modified circuit proposed is a new form of the frequency locked loop (FLL) circuit. We demonstrate that the collection of frequency degradation data from the ring circuits of each test produces Weibull distributions with steep slopes. This implies that the monitor can predict accurate end-of-life (EOL) predictions at early stages of chip degradations. The design of the microchip health monitoring system projected in this work can have great benefit in all systems using FPGA and ASIC devices.
RESUMO
In this review, recent trends in microelectronics packaging reliability are summarized. We review the technology from early packaging concepts, including wire bond and BGA, to advanced techniques used in HI schemes such as 3D stacking, interposers, fan-out packaging, and more recently developed silicon interconnect fabric integration. This review includes approaches for both design modification studies and packaged device validation. Methods are explored for compatibility in new complex packaging assemblies. Suggestions are proposed for optimizations of the testing practices to account for the challenges anticipated in upcoming HI packaging schemes.