Fully Printed Multilayer Ceramic Capacitors Based on High-k Perovskite Nanosheets.

Printing technology enables the integration of chemically exfoliated perovskite nanosheets into high-performance microcapacitors. Theoretically, the capacitance value can be further enhanced by designing and constructing multilayer structures without increasing the device size. Yet, issues such as interlayer penetration in multilayer heterojunctions constructed using inkjet printing technology further limit the realization of this potential. Herein, a series of multilayer configurations, including Ag/(Ca2NaNb4O13/Ag)n and graphene/(Ca2NaNb4O13/graphene)n (n = 1-3), are successfully inkjet-printed onto diverse rigid and flexible substrates through optimized ink formulations, inkjet printing parameters, thermal treatment conditions, and rational multilayer structural design using high-k perovskite nanosheets, graphene nanosheets and silver. The dielectric performance is optimized by fine-tuning the number of dielectric layers and modifying the electrode/dielectric interface. As a result, the graphene/(Ca2NaNb4O13/graphene)3 multilayer ceramic capacitors exhibit a remarkable capacitance density of 346 ± 12 nF cm-2 and a high dielectric constant of 193 ± 18. Additionally, these devices demonstrate moderate insulation properties, flexibility, thermal stability, and chemical sensitivity. This work shed light on the potential of multilayer structural design in additive manufacturing of high-performance 2D material-based ceramic capacitors.

Solution-processable low-voltage carbon nanotube field-effect transistors with high-krelaxor ferroelectric polymer gate insulator.

Achieving energy-efficient and high-performance field-effect transistors (FETs) is one of the most important goals for future electronic devices. This paper reports semiconducting single-walled carbon nanotube FETs (s-SWNT-FETs) with an optimized high-krelaxor ferroelectric insulator P(VDF-TrFE-CFE) thickness for low-voltage operation. The s-SWNT-FETs with an optimized thickness (∼800 nm) of the high-kinsulator exhibited the highest average mobility of 14.4 cm2V-1s-1at the drain voltage (ID) of 1 V, with a high current on/off ratio (Ion/off>105). The optimized device performance resulted from the suppressed gate leakage current (IG) and a sufficiently large capacitance (>50 nF cm-2) of the insulating layer. Despite the extremely high capacitance (>100 nF cm-2) of the insulating layer, an insufficient thickness (<450 nm) induces a highIG, leading to reducedIDand mobility of s-SWNT-FETs. Conversely, an overly thick insulator (>1200 nm) cannot introduce sufficient capacitance, resulting in limited device performance. The large capacitance and sufficient breakdown voltage of the insulating layer with an appropriate thickness significantly improved p-type performance. However, a reduced n-type performance was observed owing to the increased electron trap density caused by fluorine proportional to the insulator thickness. Hence, precise control of the insulator thickness is crucial for achieving low-voltage operation with enhanced s-SWNT-FET performance.

Effects of gamma-ray irradiation on material and electrical properties of AlN gate dielectric on 4H-SiC.

This article investigates the radiation effects on as-deposited and annealed AlN films on 4H-SiC substrates under gamma-rays. The AlN films are prepared using plasma-enhanced-atomic-layer-deposition on an n-type 4H-SiC substrate. The AlN/4H-SiC MIS structure is subjected to gamma-ray irradiation with total doses of 0, 300, and 600 krad(Si). Physical, chemical, and electrical methods were employed to study the variations in surface morphology, charge transport, and interfacial trapping characteristics induced by irradiation. After 300 krad(Si) irradiation, the as-deposited and annealed samples exhibit their highest root mean square values of 0.917 nm and 1.190 nm, respectively, which is attributed to N vacancy defects induced by irradiation. Under irradiation, the flatband voltage (Vfb) of the as-deposited sample shifts from 2.24 to 0.78 V, while the annealed sample shifts from 1.18 to 2.16 V. X-ray photoelectron spectrum analysis reveals the decomposition of O-related defects in the as-deposited AlN and the formation of Al(NOx)ycompounds in the annealed sample. Furthermore, the space-charge-limits-conduction (SCLC) in the as-deposited sample is enhanced after radiation, while the barrier height of the annealed sample decreases from 1.12 to 0.84 eV, accompanied by the occurrence of the SCLC. The physical mechanism of the degradation of electrical performance in irradiated devices is the introduction of defects like N vacancies and O-related defects like Al(NOx)y. These findings provide valuable insights for SiC power devices in space applications.

A Green High-k Dielectric from Modified Carboxymethyl Cellulose-Based with Dextrin.

Many crucial components inside electronic devices are made from non-renewable, non-biodegradable, and potentially toxic materials, leading to environmental damage. Finding alternative green dielectric materials is mandatory to align with global sustainable goals. Carboxymethyl cellulose (CMC) is a bio-polymer derived from cellulose and has outstanding properties. Herein, citric acid, dextrin, and CMC based hydrogels are prepared, which are biocompatible and biodegradable and exhibit rubber-like mechanical properties, with Young modulus values of 0.89 MPa. Hence, thin film CMC-based hydrogel is explored as a suitable green high-k dielectric candidate for operation at low voltages, demonstrating a high dielectric constant of up to 78. These fabricated transistors reveal stable high capacitance (2090 nF cm-2) for ≈±3 V operation. Using a polyelectrolyte-type approach and poly-(2-vinyl anthracene) (PVAn) surface modification, this study demonstrates a thin dielectric layer (d ≈30 nm) with a small voltage threshold (Vth ≈-0.8 V), moderate transconductance (gm ≈65 nS), and high ON-OFF ratio (≈105). Furthermore, the dielectric layer exhibits stable performance under bias stress of ± 3.5 V and 100 cycles of switching tests. The modified CMC-based hydrogel demonstrates desirable performance as a green dielectric for low-voltage operation, further highlighting its biocompatibility.

Kir7.1 knockdown and inhibition alter renal electrolyte handling but not the development of hypertension in Dahl salt-sensitive rats.

High K+ supplementation is correlated with a lower risk of the composite of death, major cardiovascular events, and ameliorated blood pressure, but the exact mechanisms have not been established. Inwardly rectifying K+ (Kir) channels expressed in the basolateral membrane of the distal nephron play an essential role in maintaining electrolyte homeostasis. Mutations in this channel family have been shown to result in strong disturbances in electrolyte homeostasis, among other symptoms. Kir7.1 is a member of the ATP-regulated subfamily of Kir channels. However, its role in renal ion transport and its effect on blood pressure have yet to be established. Our results indicate the localization of Kir7.1 to the basolateral membrane of aldosterone-sensitive distal nephron cells. To examine the physiological implications of Kir7.1, we generated a knockout of Kir7.1 (Kcnj13) in Dahl salt-sensitive (SS) rats and deployed chronic infusion of a specific Kir7.1 inhibitor, ML418, in the wild-type Dahl SS strain. Knockout of Kcnj13 (Kcnj13-/-) resulted in embryonic lethality. Heterozygous Kcnj13+/- rats revealed an increase in K+ excretion on a normal-salt diet but did not exhibit a difference in blood pressure development or plasma electrolytes after 3 wk of a high-salt diet. Wild-type Dahl SS rats exhibited increased renal Kir7.1 expression when dietary K+ was increased. K+ supplementation also demonstrated that Kcnj13+/- rats excreted more K+ on normal salt. The development of hypertension was not different when rats were challenged with high salt for 3 wk, although Kcnj13+/- rats excrete less Na+. Interestingly, chronic infusion of ML418 significantly increased Na+ and Cl- excretion after 14 days of high salt but did not alter salt-induced hypertension development. Here, we found that reduction of Kir7.1 function, either through genetic ablation or pharmacological inhibition, can influence renal electrolyte excretion but not to a sufficient degree to impact the development of SS hypertension.NEW & NOTEWORTHY To investigate the role of the Kir7.1 channel in salt-sensitive hypertension, its function was examined using complementary genetic and pharmacological approaches. The results revealed that although reducing Kir7.1 expression had some impact on maintaining K+ and Na+ balance, it did not lead to a significant change in the development or magnitude of salt-induced hypertension. Hence, it is probable that Kir7.1 works in conjunction with other basolateral K+ channels to fine-tune membrane potential.

The Absence of an Na+/Ca2+Exchanger (NCX) in Bullfrog Proximal Tubules and Cellular pH is More Influential Than Cellular Ca2+ on Proximal Na Transport.

BACKGROUND/AIMS: The functional significance of the Na+/Ca2+ exchanger (NCX) in basolateral membranes in the proximal tubule remains controversial. The key factor in crosstalk between the apical and basolateral sides is not known. METHODS: We investigated the basolateral membranes, using double-barreled Ca2+ or pH ion-selective microelectrodes. We used doubly perfused bullfrog kidneys in vivo, and switched the basolateral solution (renal portal vein) to experimental solutions. RESULTS: In the control, cellular pH (pHi) was 7.33 ± 0.032 (mean ± SE, n = 7) and in separate experiments, cellular Ca2+ activity (aCai) was 249.6 ± 35.54 nM (n = 28). Changing to respiratory acidosis, pHi was significantly acidified by 0.123 pH units on average and the change of aCai was +53.1 nM (n = 9 ns). In metabolic acidosis, pHi was reduced by 0.151 while aCai was reduced by 143.4. Using the 30 mM K+ solution, pHi was increased by 0.233 while aCai was reduced by 203.9, with depolarization. Both ionomycin and ouabain caused aCai to increase. In the 0.5 mM Na+ solution (replaced with BIDAC Cl), pHi was reduced by 0.177. No changes in aCai (+49.8 ns) were observed although we recorded depolarization of 15.2 mV. In the 0.5 mM Na+ solution, replaced with raffinose, no changes in aCai (-126.4 ns) were observed with depolarization (6.5 ns). CONCLUSION: Our results suggest that thermodynamic calculations of cellular Na+ concentration led to the conclusion that either a Na+/HCO3- exchanger (NBC) or NCX could be present in the same basolateral membrane. H+ ions are the most plausible key factor in the crosstalk.

In situx-ray photoelectron spectroscopy analysis of the atomic layer deposition of Al2O3on SiOx/Si: Interface dipole and persistent surface groups.

Atomic layer deposition (ALD) has become an essential technology in many areas. To better develop and use this technology, it is of the pivot to understand the surface chemistry during the ALD film growth. The growth of an ALD oxide film may also induce an electric dipole at the interface, which may be further tuned to modulate the flat band voltage for electronic device applications. To understand the associated surface chemistry and interface dipole formation process, we herein employ anin situx-ray photoelectron spectroscopy technique to study the ALD growth of Al2O3, from trimethylaluminum and H2O, on the SiOx/Si surface. We find that an electric dipole is formed at the Al2O3/SiOxinterface immediately after the first Al2O3layer is deposited. We also observe persistent surface methyl groups in the H2O half-cycle during ALD, and the amount of the persistent methyls is particularly higher during the initial Al2O3ALD growth, which suggests the formation of Si-CH3on the surface. These findings can provide useful routes and insights toward interface engineering by ALD.

Solving the issue of increasing forming voltage during device miniaturization in hafnium oxide-based resistive access memory using high-ksidewall material.

An electrothermal coupling model of resistive random access memory (RRAM) was established based on the oxygen vacancy conduction mechanism. By resolving the partial differential equation for the coefficients, the variation process of the device resistance was simulated. In our studies, a device model was proposed which can accurately simulate the whole process of RRAM forming, reset, and set. Based on the established model, a new high dielectric constant (high-k) material (La2O3) is introduced as the sidewall material. The La2O3sidewall material can concentrate the electric field and helps to speed up the formation of conductive filaments. The La2O3sidewall can effectively reduce the forming voltage increase during the miniaturization process. Then, the influence of sidewall thermal conductivity on forming voltage is studied, and it is discovered that low thermal conductivity helps to reduce the model's forming voltage and increase the temperature concentration. These findings serve as a foundation for more studies on the choice of sidewall materials.

Low temperature passivation of silicon surfaces for enhanced performance of Schottky-barrier MOSFET.

By using a simple device architecture along with a simple process design and a low thermal-budget of a maximum of 100 °C for passivating metal/semiconductor interfaces, a Schottky barrier MOSFET device with a low subthreshold slope of 70 mV dec-1could be developed. This device is enabled after passivation of the metal/silicon interface (found at the source/drain regions) with ultra-thin SiOxfilms, followed by the e-beam evaporation of high- quality aluminum and by using atomic-layer deposition for HfO2as a gate oxide. All of these fabrication steps were designed in a sequential process so that a gate-last recipe could minimize the defect density at the aluminum/silicon and HfO2/silicon interfaces, thus preserving the Schottky barrier height and ultimately, the outstanding performance of the transistor. This device is fully integrated into silicon after standard CMOS-compatible processing, so that it could be easily adopted into front-end-of-line or even in back-end-of-line stages of an integrated circuit, where low thermal budget is required and where its functionality could be increased by developing additional and fast logic.

A critical review of fabrication challenges and reliability issues in top/bottom gated MoS2field-effect transistors.

The voyage of semiconductor industry to decrease the size of transistors to achieve superior device performance seems to near its physical dimensional limitations. The quest is on to explore emerging material systems that offer dimensional scaling to match the silicon- based technologies. The discovery of atomic flat two-dimensional materials has opened up a completely new avenue to fabricate transistors at sub-10 nanometer level which has the potential to compete with modern silicon-based semiconductor devices. Molybdenum disulfide (MoS2) is a two-dimensional layered material with novel semiconducting properties at atomic level seems like a promising candidate that can possibly meet the expectation of Moore's law. This review discusses the various 'fabrication challenges' in making MoS2based electronic devices from start to finish. The review outlines the intricate challenges of substrate selection and various synthesis methods of mono layer and few-layer MoS2. The review focuses on the various techniques and methods to minimize interface defect density at substrate/MoS2interface for optimum MoS2-based device performance. The tunable band-gap of MoS2with varying thickness presents a unique opportunity for contact engineering to mitigate the contact resistance issue using different elemental metals. In this work, we present a comprehensive overview of different types of contact materials with myriad geometries that show a profound impact on device performance. The choice of different insulating/dielectric gate oxides on MoS2in co-planar and vertical geometry is critically reviewed and the physical feasibility of the same is discussed. The experimental constraints of different encapsulation techniques on MoS2and its effect on structural and electronic properties are extensively discussed.

Interfacial Interaction Enables Enhanced Mobility in Hybrid Perovskite-Conjugated Polymer Transistors with High-k Fluorinated Polymer Dielectrics.

The charge carrier mobility of organic field-effect transistors (OFETs) has been remarkably improved through several engineering approaches and techniques by targeting pivotal parts. Herein, an ultrathin perovskite channel layer that boosts the field-effect mobility of conjugated polymer OFETs by forming perovskite-conjugated polymer hybrid semiconducting channel is introduced. The optimized lead-iodide-based perovskite-conjugated polymer hybrid channel transistors show enhanced hole mobility of over 4 cm2  V-1  s-1 (average = 2.10 cm2  V-1  s-1 ) with high reproducibility using a benchmark poly(3-hexylthiophene) (P3HT) polymer and employing high-k fluorinated polymer dielectrics. A significant hole carrier mobility enhancement of ≈200-400% in benzo[1,2-b:4,5:b']dithiophene (BDT)-based conjugated polymers is also demonstrated by exploring certain interactive groups with perovskite. This significant enhancement in the transistor performance is attributed to the increased charge carrier density in the hybrid semiconducting channel and the perovskite-polymer interactions. The findings of this paper demonstrate an exceptional engineering approach for carrier mobility enhancement in hybrid perovskite-conjugated-polymer-based electronic devices.

Pushing the Limits of Biosensing: Selective Calcium Ion Detection with High Sensitivity via High-k Gate Dielectric Engineered Si Nanowire Random Network Channel Dual-Gate Field-Effect Transistors.

Calcium ions (Ca2+) are abundantly present in the human body; they perform essential roles in various biological functions. In this study, we propose a highly sensitive and selective biosensor platform for Ca2+ detection, which comprises a dual-gate (DG) field-effect transistor (FET) with a high-k engineered gate dielectric, silicon nanowire (SiNW) random network channel, and Ca2+-selective extended gate. The SiNW channel device, which was fabricated via the template transfer method, exhibits superior Ca2+ sensing characteristics compared to conventional film channel devices. An exceptionally high Ca2+ sensitivity of 208.25 mV/dec was achieved through the self-amplification of capacitively coupled DG operation and an enhanced amplification ratio resulting from the high surface-to-volume ratio of the SiNW channel. The SiNW channel device demonstrated stable and reliable sensing characteristics, as evidenced by minimal hysteresis and drift effects, with the hysteresis voltage and drift rate measuring less than 6.53% of the Ca2+ sensitivity. Furthermore, the Ca2+-selective characteristics of the biosensor platform were elucidated through experiments with pH buffer, NaCl, and KCl solutions, wherein the sensitivities of the interfering ions were below 7.82% compared to the Ca2+ sensitivity. The proposed Ca2+-selective biosensor platform exhibits exceptional performance and holds great potential in various biosensing fields.

Organic Field-Effect Transistor Fabricated on Internal Shrinking Substrate.

In the development of flexible organic field-effect transistors (OFET), downsizing and reduction of the operating voltage are essential for achieving a high current density with a low operating power. Although the bias voltage of the OFETs can be reduced by a high-k dielectric, achieving a threshold voltage close to zero remains a challenge. Moreover, the scaling down of OFETs demands the use of photolithography, and may lead to compatibility issues in organic semiconductors. Herein, a new strategy based on the ductile properties of organic semiconductors is developed to control the threshold voltage at close to zero while concurrently downsizing the OFETs. The OFETs are fabricated on prestressed polystyrene shrink film substrates at room temperature, then thermal energy (160 °C) is used to release the strain. The OFETs conformally attached to the wrinkled structure are shown to locally amplify the electric field. After shrinking, the horizontal device area is reduced by 75%, and the threshold voltage is decreased from -1.44 to -0.18 V, with a subthreshold swing of 74 mV dec-1 and intrinsic gain of 4.151 × 104 . These results reveal that the shrink film can be generally used as a substrate for downsizing OFETs and improving their performance.

2D Indium Phosphorus Sulfide (In2 P3 S9 ): An Emerging van der Waals High-k Dielectrics.

2D van der Waals (vdW) semiconductors hold great potentials for more-than-Moore field-effect transistors (FETs), and the efficient utilization of their theoretical performance requires compatible high-k dielectrics to guarantee the high gate coupling efficiency. The deposition of traditional high-k dielectric oxide films on 2D materials usually generates interface concerns, thereby causing the carrier scattering and degeneration of device performance. Here, utilizing a space-confined epitaxy growth approach, the authors successfully obtained air-stable ultrathin indium phosphorus sulfide (In2 P3 S9 ) nanosheets, the thickness of which can be scaled down to monolayer limit (≈0.69 nm) due to its layered structure. 2D In2 P3 S9 exhibits excellent insulating properties, with a high dielectric constant (≈24) and large breakdown voltage (≈8.1 MV cm-1 ) at room temperature. Serving as gate insulator, ultrathin In2 P3 S9 nanosheet can be integrated into MoS2 FETs with high-quality dielectric/semiconductor interface, thus providing a competitive electrical performance of device with subthreshold swings (SS) down to 88 mV dec-1 and a high ON/OFF ratio of 105 . This study proves an important strategy to prepare 2D vdW high-k dielectrics, and greatly facilitates the ongoing research of 2D materials for functional electronics.

A Sub-20 nm Organic/Inorganic Hybrid Dielectric for Ultralow-Power Organic Thin-Film Transistor (OTFT) With Enhanced Operational Stability.

Organic/inorganic hybrid materials are utilized extensively as gate dielectric layers in organic thin-film transistors (OTFTs). However, inherently low dielectric constant of organic materials and lack of a reliable deposition process for organic layers hamper the broad application of hybrid dielectric materials. Here, a universal strategy to synthesize high-k hybrid dielectric materials by incorporating a high-k polymer layer on top of various inorganic layers generated by different fabrication methods, including AlOx and HfOx , is presented. Those hybrid dielectrics commonly exhibit high capacitance (>300 nF·cm-2 ) as well as excellent insulating properties. A vapor-phase deposition method is employed for precise control of the polymer film thickness. The ultralow-voltage (<3 V) OTFTs are demonstrated based on the hybrid dielectric layer with 100% yield and uniform electrical characteristics. Moreover, the exceptionally high stability of OTFTs for long-term operation (current change less than 5% even under 30 h of voltage stress at 2.0 MV·cm-1 ) is achieved. The hybrid dielectric is fully compatible with various substrates, which allows for the demonstration of intrinsically flexible OTFTs on the plastic substrate. It is believed that this approach for fabricating hybrid dielectrics by introducing the high-k organic material can be a promising strategy for future low-power, flexible electronics.

A CMOS-compatible morphotropic phase boundary.

Morphotropic phase boundaries (MPBs) show substantial piezoelectric and dielectric responses, which have practical applications. The predicted existence of MPB in HfO2-ZrO2solid solution thin film has provided a new way to increase the dielectric properties of a silicon-compatible device. Here, we present a new fabrication design by which the density of MPBρMPBand consequently the dielectric constantϵrof HfO2-ZrO2thin film was considerably increased. TheρMPBwas controlled by fabrication of a 10 nm [1 nm Hf0.5Zr0.5O2(ferroelectric)/1 nm ZrO2(antiferroelectric)] nanolaminate followed by an appropriate annealing process. The coexistence of orthorhombic and tetragonal structures, which are the origins of ferroelectric (FE) and antiferroelectric (AFE) behaviors, respectively, was structurally confirmed, and a double hysteresis loop that originates from AFE ordering, with some remnant polarization that originates from FE ordering, was observed inP-Ecurve. A remarkable increase inϵrcompared to the conventional HfO2-ZrO2thin film was achieved by controlling the FE-AFE ratio. The fabrication process was performed at low temperature (250 °C) and the device is compatible with silicon technology, so the new design yields a device that has possible applications in near-future electronics.

The effect of an annealing process on atomic layer deposited TiO2thin films.

In this paper, we study the property changes in TiO2thin films related to annealing under various conditions. XPS analysis showed that the concentration of oxygen vacancies in TiO2thin films was reduced by annealing. In the case of annealing in an O2and air atmosphere, the oxygen vacancy concentration was reduced to the greatest extent as oxygen diffused into the TiO2thin film and rearrangement of atoms occurred. XRD analysis showed that the anatase structure of annealed TiO2thin films was clearly present compared to the as-deposited TiO2thin film.I-Vanalysis showed that the lower the concentration of oxygen vacancy, the lower the leakage current (O2annealed TiO2: 10-4A cm-2) than as dep TiO2thin film (∼10-1A cm-2). The dielectric constant of annealed TiO2thin films was 26-30 which was higher than the as-deposited TiO2thin film (k âˆ¼ 18) because the anatase structure became more apparent.

High-kerbium oxide film prepared by sol-gel method for low-voltage thin-film transistor.

In this work, high-dielectric-constant (high-k) erbium oxide（Er2O3）film is fabricated using the spin coating method, and annealed at a series of temperatures (from 400 °C to 700 °C). The effect of annealing temperature on the microstructural and electrical properties of Er2O3nanofilm is investigated. To demonstrate the applicability of the Er2O3film, the indium oxide (In2O3) thin film transistor (TFT)-based amorphous Er2O3dielectric film is fabricated at different temperatures. The TFT-based EO-600 shows a low-operating voltage and good electrical properties. The inverter demonstrates that the Er2O3nanofilm synthesized by the sol-gel method could be a promising candidate as the dielectric layer in a low-voltage electronic device.

EHD-jet patterned MoS2on a high-kdielectric for high mobility in thin film transistor applications.

Solution synthesis of MoS2precursor followed by direct printing could be an effective way to make printed electronic devices. A linear MoS2pattern was obtained by an electrohydrodynamic (EHD)-jet printer with a sol-gel system without chemical vapor deposition. The morphology of the MoS2after a transfer process was maintained without wrinkles or cracking, resulting in a smooth surface compared with that of spin-coated films. EHD-jet printed MoS2was transferred onto high-kdielectric Al2O3and used as a semiconductor layer in thin film transistor (TFT) devices. The printed MoS2TFT has relatively good electrical characteristics, such as a linear field effect mobility, current ratio, and low subthreshold swing of 47.64 ± 2.99 cm2V-1s-1, 7.39 ± 0.12 × 106, and 0.7 ± 0.05 V decade-1, respectively. This technique may have promise for future applications.

Atomic layer deposition for rutile structure TiO2thin films using a SnO2seed layer and low temperature heat treatment.

We study the rutile-TiO2film deposition with a high-kvalue using a SnO2seed layer and a low temperature heat treatment. Generally, heat treatment over 600 °C is required to obtain the rutile-TiO2film. However, By using a SnO2seed layer, we obtained rutile-TiO2films with heat treatments as low as 400 °C. The XPS analysis confirms that the SnO2and TiO2film were deposited. The XRD analysis showed that a heat treatment at 400 °C after depositing the SnO2and TiO2films was effective in obtaining the rutile-TiO2film when the SnO2film was thicker than 10 nm. The TEM/EDX analysis show that no diffusion in the thin film between TiO2and SnO2. The dielectric constant of the TiO2film deposited on the SnO2film (20 nm) was 67, which was more than twice as high as anatase TiO2dielectric constant (Anatase TiO2dielectric constant : 15-40). The current density was 10-4A cm-2at 0.7 V and this value confirmed that the leakage current was not affected by the SnO2seed layer.