ABSTRACT
A highly promising route to scale millions of qubits is to use quantum photonic integrated circuits (PICs), where deterministic photon sources, reconfigurable optical elements, and single-photon detectors are monolithically integrated on the same silicon chip. The isolation of single-photon emitters, such as the G centers and W centers, in the optical telecommunication O-band, has recently been realized in silicon. In all previous cases, however, single-photon emitters were created uncontrollably in random locations, preventing their scalability. Here, we report the controllable fabrication of single G and W centers in silicon wafers using focused ion beams (FIB) with high probability. We also implement a scalable, broad-beam implantation protocol compatible with the complementary-metal-oxide-semiconductor (CMOS) technology to fabricate single telecom emitters at desired positions on the nanoscale. Our findings unlock a clear and easily exploitable pathway for industrial-scale photonic quantum processors with technology nodes below 100 nm.
ABSTRACT
Highly sensitive short-wave infrared (SWIR) detectors, compatible with the silicon-based complementary metal oxide semiconductor (CMOS) process, are regarded as the key enabling components in the miniaturized system for weak signal detection. To date, the high photogain devices are greatly limited by a large bias voltage, low-temperature refrigeration, narrow response band, and complex fabrication processes. Here, we demonstrate high photogain detectors working in the SWIR region at room temperature, which use graphene for charge transport and Te-hyperdoped silicon (Te-Si) for infrared absorption. The prolonged lifetime of carriers, combined with the built-in potential generated at the interface between the graphene and the Te-Si, leads to an ultrahigh photogain of 109 at room temperature (300 K) for 1.55 µm light. The gain can be improved to 1012, accompanied by a noise equivalent power (NEP) of 0.08 pW Hz-1/2 at 80 K. Moreover, the proposed device exhibits a NEP of 4.36 pW Hz-1/2 at 300 K at the wavelength of 2.7 µm, which is exceeding the working region of InGaAs detectors. This research shows that graphene can be used as an efficient platform for silicon-based SWIR detection and provides a strategy for the low-power, uncooled, high-gain infrared detectors compatible with the CMOS process.