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A Mixture of Negative-, Zero-, and Positive-Differential Transconductance Switching from Tellurium/Indium Gallium Zinc Oxide Heterostructures.
Lee, Dong Hyun; Kim, Somi; Woo, Gunhoo; Kim, Taesung; Kim, Yeong Jae; Yoo, Hocheon.
Afiliação
  • Lee DH; Department of Electronic Engineering, Gachon University, Seongnam, Gyeonggi 13120, Republic of Korea.
  • Kim S; Department of Electronic Engineering, Gachon University, Seongnam, Gyeonggi 13120, Republic of Korea.
  • Woo G; SKKU Advanced Institute of Nanotechnology, Sungkyunkwan University (SKKU), Suwon, Gyeonggi-do 16419, Republic of Korea.
  • Kim T; SKKU Advanced Institute of Nanotechnology, Sungkyunkwan University (SKKU), Suwon, Gyeonggi-do 16419, Republic of Korea.
  • Kim YJ; School of Mechanical Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 16419, Republic of Korea.
  • Yoo H; Ceramic Total Solution Center, Korea Institute of Ceramic Engineering and Technology, Icheon 17303, Republic of Korea.
Article em En | MEDLINE | ID: mdl-38593271
ABSTRACT
Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.
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Texto completo: 1 Base de dados: MEDLINE Idioma: En Revista: ACS Appl Mater Interfaces Ano de publicação: 2024 Tipo de documento: Article

Texto completo: 1 Base de dados: MEDLINE Idioma: En Revista: ACS Appl Mater Interfaces Ano de publicação: 2024 Tipo de documento: Article