Tuning the Threshold Voltage of an Oxide Thin-Film Transistor by Electron Injection Control Using a p-n Semiconductor Heterojunction Structure.

Herein, a heterojunction structure integrating p-type tellurium (Te) and n-type aluminum-doped indium-zinc-tin oxide (Al:IZTO) is shown to precisely modulate the threshold voltage (VT) of the oxide thin-film transistor (TFT). The proposed architecture integrates Te as an electron-blocking layer and Al:IZTO as a charge-carrier transporting layer, thereby enabling controlled electron injection. The effects of incorporating the Te layer onto Al:IZTO are investigated, with a focus on X-ray photoelectron spectroscopy (XPS) analysis, in order to explain the behavior of oxygen vacancies and to depict the energy band structure configurations. By modulating the thickness and employing both single and double deposition methods for the heterojunction Te layer, a remarkable VT shift of up to +20 V is achieved. Furthermore, this study also shows excellent stability to a positive bias stress of +2 MV/cm for 10,000 s without additional passivation layers, demonstrating the robustness of the designed TFT. By a thorough optimization of the Al:IZTO/Te interface, the results demonstrate not only the substantial impact of the introduced heterojunction structure on VT control but also the endurance, durability, and stability of the optimized TFTs under prolonged long-term operating stress, thus offering promising prospects for tailored semiconductor device applications.

Effect of Bias Potential on the Interface of a Solid Electrolyte and Electrode during XPS Depth Profiling Analysis.

Depth profiling is an essential method to investigate the physical and chemical properties of a solid electrolyte and electrolyte/electrode interface. In conventional depth profiling, various spectroscopic tools such as X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) are utilized to monitor the chemical states along with ion bombardment to etch a sample. Nevertheless, the ion bombardment during depth profiling results in an inevitable systematic error, i.e., the accumulation of mobile ions at the electrolyte/electrode interface, known as the ion pile-up phenomenon. Here, we propose a novel method using bias potential, the substrate-bias method, to prevent the ion pile-up phenomena during depth profiling of a solid electrolyte. When the positive bias potential is applied on the substrate (electrode), the number of accumulating ions at the electrolyte/electrode interface is significantly reduced. The in-depth XPS analysis with the biased electrode reveals not only the suppression of the ion pile-up phenomena but also the altered chemical states at the interfacial region between the electrolyte and electrode depending on the bias. The proposed substrate-bias method can be a good alternative scheme for an efficient yet precise depth profiling technique for a solid electrolyte.

Quantitative analysis of defect states in InGaZnO within 2 eV below the conduction band via photo-induced current transient spectroscopy.

This work investigates the function of the oxygen partial pressure in photo-induced current measurement of extended defect properties related to the distribution and quantity of defect states in electronic structures. The Fermi level was adjusted by applying a negative gate bias in the TFT structure, and the measurable range of activation energy was extended to < 2.0 eV. Calculations based on density functional theory are used to investigate the changes in defect characteristics and the role of defects at shallow and deep levels as a function of oxygen partial pressure. Device characteristics, such as mobility and threshold voltage shift under a negative gate bias, showed a linear correlation with the ratio of shallow level to deep level defect density. Shallow level and deep level defects are organically related, and both defects must be considered when understanding device characteristics.

Organic/Inorganic Hybrid Top-Gate Transistors with Ultrahigh Electron Mobility via Enhanced Electron Pathways.

The top-gate structure is currently adopted in various flat-panel displays because of its diverse advantages such as passivation from the external environment and process compatibility with industries. However, the mobility of the currently commercialized top-gate oxide thin-film transistors (TFTs) is insufficient to drive ultrahigh-resolution displays. Accordingly, this work suggests metal-capped Zn-Ba-Sn-O transistors with top-gate structures for inducing mobility-enhancing effects. The fabricated top-gate device contains para-xylylene (PPx), which is deposited by a low-temperature chemical vapor deposition (CVD) process, as a dielectric layer and exhibits excellent interfacial and dielectric properties. A technology computer-aided design (TCAD) device simulation reveals that the mobility enhancement in the Al-capped (Zn,Ba)SnO3 (ZBTO) TFT is attributed not only to the increase in the electron concentration, which is induced by band engineering due to the Al work function but also to the increased electron velocity due to the redistribution of the lateral electric field. As a result, the mobility of the Al-capped top-gate ZBTO device is 5 times higher (∼110 cm2/Vs) than that of the reference device. These results demonstrate the applicability of top-gate oxide TFTs with ultrahigh mobility in a wide range of applications, such as for high-resolution, large-area, and flexible displays.

Silicone engineered anisotropic lithography for ultrahigh-density OLEDs.

Ultrahigh-resolution patterning with high-throughput and high-fidelity is highly in demand for expanding the potential of organic light-emitting diodes (OLEDs) from mobile and TV displays into near-to-eye microdisplays. However, current patterning techniques so far suffer from low resolution, consecutive pattern for RGB pixelation, low pattern fidelity, and throughput issue. Here, we present a silicone engineered anisotropic lithography of the organic light-emitting semiconductor (OLES) that in-situ forms a non-volatile etch-blocking layer during reactive ion etching. This unique feature not only slows the etch rate but also enhances the anisotropy of etch direction, leading to gain delicate control in forming ultrahigh-density multicolor OLES patterns (up to 4500 pixels per inch) through photolithography. This patterning strategy inspired by silicon etching chemistry is expected to provide new insights into ultrahigh-density OLED microdisplays.

Controlling resistive switching behavior in the solution processed SiO2-x device by the insertion of TiO2 nanoparticles.

The resistive switching behavior of the solution processed SiOx device was investigated by inserting TiO2 nanoparticles (NPs). Compared to the pristine SiOx device, the TiO2 NPs inserted SiOx (SiOx@TiO2 NPs) device achieves outstanding switching characteristics, namely a higher ratio of SET/RESET, lower operating voltages, improved cycle-to-cycle variability, faster switching speed, and multiple-RESET states. Density functional theory calculation (DFT) and circuit breaker simulation (CB) were used to detail the origin of the outstanding switching characteristic of the SiOx@TiO2 NPs. The improvement in resistive switching is mainly based on the difference in formation/rupture of the conductive path in the SiO2 and SiO2@TiO2 NPs devices. In particular, the reduction of resistance and lower switching voltage of TiO2 NPs control the formation and rupture of the conductive path to achieve more abrupt switching between SET/RESET with higher on/off ratio. This method of combined DFT calculation and CB offers a promising approach for high-performance non-volatile memory applications.

Multi-level characteristics of TiOx transparent non-volatile resistive switching device by embedding SiO2 nanoparticles.

TiOx-based resistive switching devices have recently attracted attention as a promising candidate for next-generation non-volatile memory devices. A number of studies have attempted to increase the structural density of resistive switching devices. The fabrication of a multi-level switching device is a feasible method for increasing the density of the memory cell. Herein, we attempt to obtain a non-volatile multi-level switching memory device that is highly transparent by embedding SiO2 nanoparticles (NPs) into the TiOx matrix (TiOx@SiO2 NPs). The fully transparent resistive switching device is fabricated with an ITO/TiOx@SiO2 NPs/ITO structure on glass substrate, and it shows transmittance over 95% in the visible range. The TiOx@SiO2 NPs device shows outstanding switching characteristics, such as a high on/off ratio, long retention time, good endurance, and distinguishable multi-level switching. To understand multi-level switching characteristics by adjusting the set voltages, we analyze the switching mechanism in each resistive state. This method represents a promising approach for high-performance non-volatile multi-level memory applications.

Ensemble Design of Electrode-Electrolyte Interfaces: Toward High-Performance Thin-Film All-Solid-State Li-Metal Batteries.

In accordance with the fourth industrial revolution (4IR), thin-film all-solid-state batteries (TF-ASSBs) are being revived as the most promising energy source to power small electronic devices. However, current TF-ASSBs still suffer from the perpetual necessity of high-performance battery components. While every component, a series of a TF solid electrolyte (i.e., lithium phosphorus oxynitride (LiPON)) and electrodes (cathode and Li metal anode), has been considered vital, the lack of understanding of and ability to ameliorate the cathode (or anode)-electrolyte interface (CEI) (or AEI) has impeded the development of TF-ASSBs. In this work, we suggest an ensemble design of TF-ASSBs using LiPON (500 nm), an amorphous TF-V2O5-x cathode with oxygen vacancies (Ovacancy), a thin evaporated Li anode (evp-Li) with a thickness of 1 µm, and an artificial ultrathin Al2O3 layer between evp-Li and LiPON. Well-defined Ovacancy sites, such as O(II)vacancy and O(III)vacancy, in amorphous TF-V2O5-x not only allow isotropic Li+ diffusion at the CEI but also enhance both the ionic and electronic conductivities. For the AEI, we employed protective Al2O3, which was specially sputtered using the facing target sputtering (FTS) method to form a homogeneous layer without damage from plasma. In regard to the contact with evp-Li, interfacial stability, electrochemical impedance, and battery performance, the nanometric Al2O3 layers (1 nm) were optimized at different temperatures (40, 60, and 80 °C). The TF-ASSB cell containing Al2O3 (1 nm) delivers a high specific capacity of 474.01 mAh cm-3 under 60 °C at 2 C for the 400th cycle, and it achieves a long lifespan as well as ultrafast rate capability levels, even at 100 C; these results were comparable to those of TF Li-ion battery cells using a liquid electrolyte. We demonstrated the reaction mechanism at the AEI utilizing time-of-flight secondary ion mass spectrometry (TOF-SIMS) and molecular dynamics (MD) simulations for a better understanding. Our design provides a signpost for future research on the rational structure of TF-LIBs.

Light-Emitting Transistors with High Color Purity Using Perovskite Quantum Dot Emitters.

The class of organic-inorganic lead halides with perovskite crystal structures has recently emerged as promising materials for a variety of practical optoelectronic applications. In particular, hybrid halide perovskite quantum dots possess excellent intrinsic optoelectronic properties such as high color purity (full width at half-maximum of 24.59 nm) and photoluminescence quantum yields (92.7%). In this work, we demonstrate the use of perovskite quantum dot materials as an emissive layer of hybrid light-emitting transistors. To investigate the working mechanism of perovskite quantum dots in light-emitting transistors, we investigated the electrical and optical characteristics under both p-channel and n-channel operation. Using these materials, we have achieved perovskite quantum dot light-emitting transistors with high electron mobilities of up to 12.06 cm2·V-1 s-1, high brightness of up to 1.41 × 104 cd m-2, and enhanced external quantum efficiencies of up to 1.79% operating at a source-drain potential of 40 V.

Tungsten-Doped Zinc Oxide and Indium-Zinc Oxide Films as High-Performance Electron-Transport Layers in N-I-P Perovskite Solar Cells.

Perovskite solar cells (PSCs) have attracted tremendous research attention due to their potential as a next-generation photovoltaic cell. Transition metal oxides in N-I-P structures have been widely used as electron-transporting materials but the need for a high-temperature sintering step is incompatible with flexible substrate materials and perovskite materials which cannot withstand elevated temperatures. In this work, novel metal oxides prepared by sputtering deposition were investigated as electron-transport layers in planar PSCs with the N-I-P structure. The incorporation of tungsten in the oxide layer led to a power conversion efficiency (PCE) increase from 8.23% to 16.05% due to the enhanced electron transfer and reduced back-recombination. Scanning electron microscope (SEM) images reveal that relatively large grain sizes in the perovskite phase with small grain boundaries were formed when the perovskite was deposited on tungsten-doped films. This study demonstrates that novel metal oxides can be used as in perovskite devices as electron transfer layers to improve the efficiency.

Significant enhancement of the bias stability of Zn-O-N thin-film transistors via Si doping.

Si doping was used to significantly improve the bias stability of ZnON thin-film transistors. Si 3 W (~1%) doped ZnON TFTs showed a saturation mobility of 19.70 cm2/Vs along with remarkable improvements in the threshold voltage shift for negative gate bias stress (NBS) within 1.69 V. The effects of Si doping were interpreted by the experimental correlation between device performance and physical analysis, as well as by the theoretical calculation. Si doping induces the reduction of N-related defects by increasing stoichiometric Zn3N2, and decreasing nonstoichiometric ZnxNy. In addition, Si doping reduces the band edge states below the conduction band. According to density functional theory (DFT) calculations, Si, when it substitutes for Zn, acts as a carrier suppressor in the ZnON matrix.

Material Design of New p-Type Tin Oxyselenide Semiconductor through Valence Band Engineering and Its Device Application.

This paper reports a new p-type tin oxyselenide (SnSeO), which was designed with the concept that the valence band edge from O 2p orbitals in the majority of metal oxides becomes delocalized by hybridizing Se 4p and Sn 5s orbitals. As the Se loading increased, the SnSeO film structures were transformed from tetragonal SnO to orthorhombic SnSe, which was accompanied by an increase in the amorphous phase portion and smooth morphologies. The SnSe0.56O0.44 film annealed at 300 °C exhibited the highest Hall mobility (µHall), 15.0 cm2 (V s)-1, and hole carrier density (nh), 1.2 × 1017 cm-3. The remarkable electrical performance was explained by the low hole effective mass, which was calculated by a first principle calculation. Indeed, the fabricated field-effect transistor (FET) with a p-channel SnSe0.56O0.44 film showed the high field-effect mobility of 5.9 cm2 (V s)-1 and an ION/OFF ratio of 3 × 102. This work demonstrates that anion alloy-based hybridization provides a facile route to the realization of a high-performance p-channel FET and complementary devices.

Universal Route to Impart Orthogonality to Polymer Semiconductors for Sub-Micrometer Tandem Electronics.

A universal method that enables utilization of conventional photolithography for processing a variety of polymer semiconductors is developed. The method relies on imparting chemical and physical orthogonality to a polymer film via formation of a semi-interpenetrating diphasic polymer network with a bridged polysilsesquioxane structure, which is termed an orthogonal polymer semiconductor gel. The synthesized gel films remain tolerant to various chemical and physical etching processes involved in photolithography, thereby facilitating fabrication of high-resolution patterns of polymer semiconductors. This method is utilized for fabricating tandem electronics, including pn-complementary inverter logic devices and pixelated polymer light-emitting diodes, which require deposition of multiple polymer semiconductors through solution processes. This novel and universal method is expected to significantly influence the development of advanced polymer electronics requiring sub-micrometer tandem structures.

Effect of counter-ions on the properties and performance of non-conjugated polyelectrolyte interlayers in solar cell and transistor devices.

We have investigated a series of non-conjugated polyelectrolytes (NPEs) which are based on a polyethylenimine (PEI) backbone with various counterions, such as Br- I- and BIm4 -, as interfacial layers at the electrodes of solar cells and transistor devices to improve the power conversion efficiency (PCE) and device performance. This new series of NPEs with different counterions are capable of forming electric dipoles at NPE/metal electrode interfaces; as a consequence tuning of the energy levels, and work function (WF) of the electrodes is possible. Using this approach, the PCE of organic solar cells could be improved from 1.05% (without NPEs) to 6.77% (with NPEs) while the charge carrier mobility and on/off ratio of FET devices could be improved, showing the broad utility of this type of material. This study provides a novel approach towards investigating the influence of ions on interfacial dipoles and electrode WFs in solution-processed semiconducting devices.

Replacement of n-type layers with a non-toxic APTES interfacial layer to improve the performance of amorphous Si thin-film solar cells.

Hydrogenated amorphous Si (a-Si:H) thin-film solar cells (TFSCs) generally contain p/n-type Si layers, which are fabricated using toxic gases. The substitution of these p/n-type layers with non-toxic materials while improving the device performance is a major challenge in the field of TFSCs. Herein, we report the fabrication of a-Si:H TFSCs with the n-type Si layer replaced with a self-assembled monolayer (3-aminopropyl) triethoxysilane (APTES). The X-ray photoelectron spectroscopy results showed that the amine groups from APTES attached with the hydroxyl groups (-OH) on the intrinsic Si (i-Si) surface to form a positive interfacial dipole towards i-Si. This interfacial dipole facilitated the decrease in electron extraction barrier by lowering the work function of the cathode. Consequently, the TFSC with APTES showed a higher fill factor (0.61) and power conversion efficiency (7.68%) than the reference device (without APTES). This performance enhancement of the TFSC with APTES can be attributed to its superior built-in potential and the reduction in the Schottky barrier of the cathode. In addition, the TFSCs with APTES showed lower leakage currents under dark conditions, and hence better charge separation and stability than the reference device. This indicates that APTES is a potential alternative to n-type Si layers, and hence can be used for the fabrication of non-toxic air-stable a-Si:H TFSCs with enhanced performance.

Effects of Embedded TiO2-x Nanoparticles on Triboelectric Nanogenerator Performance.

Triboelectric nanogenerators (TENGs) are used as self-power sources for various types of devices by converting external waves, wind, or other mechanical energies into electric power. However, obtaining a high-output performance is still of major concern for many applications. In this study, to enhance the output performance of polydimethylsiloxane (PDMS)-based TENGs, highly dielectric TiO2-x nanoparticles (NPs) were embedded as a function of weight ratio. TiO2-x NPs embedded in PDMS at 5% showed the highest output voltage and current. The improved output performance at 5% is strongly related to the change of oxygen vacancies on the PDMS surface, as well as the increased dielectric constant. Specifically, oxygen vacancies in the oxide nanoparticles are electrically positive charges, which is an important factor that can contribute to the exchange and trapping of electrons when driving a TENG. However, in TiO2-x NPs containing over 5%, the output performance was significantly degraded because of the increased leakage characteristics of the PDMS layer due to TiO2-x NPs aggregation, which formed an electron path.

Interface engineering for a stable chemical structure of oxidized-black phosphorus via self-reduction in AlOx atomic layer deposition.

We evaluated the change in the chemical structure between dielectrics (AlOx and HfOx) grown by atomic layer deposition (ALD) and oxidized black phosphorus (BP), as a function of air exposure time. Chemical and structural analyses of the oxidized phosphorus species (PxOy) were performed using atomic force microscopy, X-ray photoelectron spectroscopy, scanning electron microscopy, transmission electron microscopy, first-principles density functional theory calculations, and the electrical characteristics of field-effect transistors (FETs). Based on the combined experiments and theoretical investigations, we clearly show that oxidized phosphorus species (PxOy, until exposed for 24 h) are significantly decreased (self-reduction) during the ALD of AlOx. In particular, the field effect characteristics of a FET device based on Al2O3/AlOx/oxidized BP improved significantly with enhanced electrical properties, a mobility of ∼253 cm2 V-1 s-1 and an on-off ratio of ∼105, compared to those of HfO2/HfOx/oxidized BP with a mobility of ∼97 cm2 V-1 s-1 and an on-off ratio of ∼103-104. These distinct differences result from a significantly decreased interface trap density (Dit ∼ 1011 cm-2 eV-1) and subthreshold gate swing (SS ∼ 270 mV dec-1) in the BP device caused by the formation of stable energy states at the AlOx/oxidized BP interface, even with BP oxidized by air exposure.

Enhancement of the Device Performance and the Stability with a Homojunction-structured Tungsten Indium Zinc Oxide Thin Film Transistor.

Tungsten-indium-zinc-oxide thin-film transistors (WIZO-TFTs) were fabricated using a radio frequency (RF) co-sputtering system with two types of source/drain (S/D)-electrode material of conducting WIZO (homojunction structure) and the indium-tin oxide (ITO) (heterojunction structure) on the same WIZO active-channel layer. The electrical properties of the WIZO layers used in the S/D electrode and the active-channel layer were adjusted through oxygen partial pressure during the deposition process. To explain enhancements of the device performance and stability of the homojunction-structured WIZO-TFT, a systematic investigation of correlation between device performance and physical properties at the interface between the active layer and the S/D electrodes such as the contact resistance, surface/interfacial roughness, interfacial-trap density, and interfacial energy-level alignments was conducted. The homojunction-structured WIZO-TFT exhibited a lower contact resistance, smaller interfacial-trap density, and flatter interfacial roughness than the WIZO-TFT with the heterojunction structure. The 0.09 eV electron barrier of the homojunction-structured WIZO-TFT is lower than the 0.21 eV value that was obtained for the heterojunction-structured WIZO-TFT. This reduced electron barrier may be attributed to enhancements of device performance and stability, that are related to the carrier transport.

Characterization of Rotational Stacking Layers in Large-Area MoSe2 Film Grown by Molecular Beam Epitaxy and Interaction with Photon.

Transition metal dichalcogenides (TMDCs) are promising next-generation materials for optoelectronic devices because, at subnanometer thicknesses, they have a transparency, flexibility, and band gap in the near-infrared to visible light range. In this study, we examined continuous, large-area MoSe2 film, grown by molecular beam epitaxy on an amorphous SiO2/Si substrate, which facilitated direct device fabrication without exfoliation. Spectroscopic measurements were implemented to verify the formation of a homogeneous MoSe2 film by performing mapping on the micrometer scale and measurements at multiple positions. The crystalline structure of the film showed hexagonal (2H) rotationally stacked layers. The local strain at the grain boundaries was mapped using a geometric phase analysis, which showed a higher strain for a 30° twist angle compared to a 13° angle. Furthermore, the photon-matter interaction for the rotational stacking structures was investigated as a function of the number of layers using spectroscopic ellipsometry. The optical band gap for the grown MoSe2 was in the near-infrared range, 1.24-1.39 eV. As the film thickness increased, the band gap energy decreased. The atomically controlled thin MoSe2 showed promise for application to nanoelectronics, photodetectors, light emitting diodes, and valleytronics.

Unraveling the Issue of Ag Migration in Printable Source/Drain Electrodes Compatible with Versatile Solution-Processed Oxide Semiconductors for Printed Thin-Film Transistor Applications.

In recent decades, solution-processable, printable oxide thin-film transistors have garnered a tremendous amount of attention given their potential for use in low-cost, large-area electronics. However, printable metallic source/drain electrodes undergo undesirable electrical/thermal migration at an interfacial stack of the oxide semiconductor and metal electrode. In this study, we report oleic acid-capped Ag nanoparticles that effectively suppress the significant Ag migration and facilitate high field-effect mobilities in oxide transistors. The origin of the role of surface-capped Ag nanoparticles is clarified with comparative studies based on X-ray photoelectron spectroscopy and X-ray absorption spectroscopy.