Material and Device Structure Designs for 2D Memory Devices Based on the Floating Gate Voltage Trajectory.

Sasaki, Taro; Ueno, Keiji; Taniguchi, Takashi; Watanabe, Kenji; Nishimura, Tomonori; Nagashio, Kosuke.

Afiliación

Sasaki T; Department of Materials Engineering, The University of Tokyo, Tokyo 113-8656, Japan.
Ueno K; Department of Chemistry, Saitama University, Saitama 338-8570, Japan.
Nishimura T; Department of Materials Engineering, The University of Tokyo, Tokyo 113-8656, Japan.
Nagashio K; Department of Materials Engineering, The University of Tokyo, Tokyo 113-8656, Japan.

ACS Nano ; 15(4): 6658-6668, 2021 Apr 27.

Article en En | MEDLINE | ID: mdl-33765381