Multilayer ferromagnetic spintronic devices for neuromorphic computing applications.

Based on ferromagnetic thin film systems, spintronic devices show substantial prospects for energy-efficient memory, logic, and unconventional computing paradigms. This paper presents a multilayer ferromagnetic spintronic device's experimental and micromagnetic simulation-based realization for neuromorphic computing applications. The device exhibits a temperature-dependent magnetic field and current-controlled multilevel resistance state switching. To study the scalability of the multilayer spintronic devices for neuromorphic applications, we further simulated the scaled version of the multilayer system read using the magnetic tunnel junction (MTJ) configuration down to 64 nm width. We show the device applications in hardware neural networks using the multiple resistance states as the synaptic weights. A varying pulse amplitude scheme is also proposed to improve the device's weight linearity. The simulated device shows an energy dissipation of 1.23 fJ for a complete potentiation/depression. The neural network based on these devices was trained and tested on the MNIST dataset using a supervised learning algorithm. When integrated as a weight into a 3-layer, fully connected neural network, these devices achieve recognition accuracy above 90% on the MNIST dataset. Thus, the proposed device demonstrates significant potential for neuromorphic computing applications.

An interconnect-free micro-electromechanical 7-bit arithmetic device for multi-operand programmable computing.

Computational power density and interconnection between transistors have grown to be the dominant challenges for the continued scaling of complementary metal-oxide-semiconductor (CMOS) technology due to limited integration density and computing power. Herein, we designed a novel, hardware-efficient, interconnect-free microelectromechanical 7:3 compressor using three microbeam resonators. Each resonator is configured with seven equal-weighted inputs and multiple driven frequencies, thus defining the transformation rules for transmitting resonance frequency to binary outputs, performing summation operations, and displaying outputs in compact binary format. The device achieves low power consumption and excellent switching reliability even after 3 × 103 repeated cycles. These performance improvements, including enhanced computational power capacity and hardware efficiency, are paramount for moderately downscaling devices. Finally, our proposed paradigm shift for circuit design provides an attractive alternative to traditional electronic digital computing and paves the way for multioperand programmable computing based on electromechanical systems.