ABSTRACT
This paper presents the design of a Pipelined Analog-to-Digital Converter (ADC) for Electroencephalogram (EEG) applications with 10 bits of resolution, 1.2V of supply voltage and only 1.5 microW of power consumption using a standard 0.5 microm CMOS technology. Low-voltage and low-power operation has been achieved using Quasi-Floating-Gate (QFG) based circuits. The use of a new class-AB operational amplifier in weak inversion allows very low power consumption and high enough open loop gain. Simulation results show an energy efficiency of 0.84 pJ per quantization level, placing the converter into the state-of-the-art of low-frequency low-power ADCs.
Subject(s)
Analog-Digital Conversion , Data Compression/methods , Electroencephalography/instrumentation , Signal Processing, Computer-Assisted/instrumentation , Equipment Design , Equipment Failure Analysis , Reproducibility of Results , Sensitivity and SpecificityABSTRACT
This paper presents a second-order Sigma-Delta modulator for electroencephalogram applications with 10 bits of resolution, 1.2 V of supply voltage, and only 140 nW of power consumption over a bandwidth of 25 Hz. Low-voltage operation has been achieved using quasi-floating-gate-based circuits. The use of a new class-AB operational amplifier in weak inversion allows very low power consumption. Experimental results show an energy efficiency of 1.6 pJ per quantization level, making it the most energy-efficient converter reported to date in the very low signal bandwidth range.
ABSTRACT
A low-voltage and low-power front-end for miniaturized, wearable EEG systems is presented. The instrumentation amplifier, which removes the electrode drift and conditions the signal for a 10-bit A/D converter, combines a chopping strategy with quasi-FGMOS (QFG) transistors to minimize low frequency noise whilst enabling operation at 1 V supply. QFG devices are also key to the A/D converter operating at 1.2 V with 70dB of SNR and an oversampling ratio of 64. The whole system consumes less than 2uW at 1.2V.