Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Impact ionization-induced bistability in CMOS transistors at cryogenic temperatures for capacitorless memory applications.

Cryogenic operation of complementary metal oxide semiconductor (CMOS) silicon transistors is crucial for quantum information science, but it brings deviations from standard transistor operation. Here, we report on sharp current jumps and stable hysteretic loops in the drain current as a function of gate voltage V G for both n- and p-type commercial-foundry 180-nm-process CMOS transistors when operated at voltages exceeding 1.3 V at cryogenic temperatures. The physical mechanism responsible for the device bistability is impact ionization charging of the transistor body, which leads to effective back-gating of the inversion channel. This mechanism is verified by independent measurements of the body potential. The hysteretic loops, which have a >107 ratio of high to low drain current states at the same V G, can be used for a compact capacitorless single-transistor memory at cryogenic temperatures with long retention times.

Electron beam-based metrology after CMOS.

The magnitudes of the challenges facing electron-based metrology for post-CMOS technology are reviewed. Directed selfassembly, nanophotonics/plasmonics, and resistive switches and selectors, are examined as exemplars of important post-CMOS technologies. Materials, devices, and architectures emerging from these technologies pose new metrology requirements: defect detection, possibly subsurface, in soft materials, accurate measurement of size, shape, and roughness of structures for nanophotonic devices, contamination-free measurement of surface-sensitive structures, and identification of subtle structural, chemical, or electronic changes of state associated with switching in non-volatile memory elements. Electron-beam techniques are examined in the light of these emerging requirements. The strong electron-matter interaction provides measurable signal from small sample features, rendering electron-beam methods more suitable than most for nanometer-scale metrology, but as is to be expected, solutions to many of the measurement challenges are yet to be demonstrated. The seeds of possible solutions are identified when they are available.