High-Performance Complementary Circuits from Two-Dimensional MoTe2.

Two-dimensional (2D) materials hold great promise for future complementary metal-oxide semiconductor (CMOS) technology. However, the lack of effective methods to tune the Schottky barrier poses a challenge in constructing high-performance complementary circuits from the same material. Here, we reveal that the polarity of pristine MoTe2 field-effect transistors (FETs) with minimized air exposure is n-type, irrespective of the metal contact type. The fabricated n-FETs with palladium contact can reach electron currents up to 275 µA/µm at VDS = 2 V. For p-FETs, we introduce a novel nitric oxide doping strategy, allowing a controlled transition of MoTe2 FETs from n-type to unipolar p-type. By doping only in the contact region, we demonstrate hole currents up to 170 µA/µm at VDS= -2 V with preserved Ion/Ioff ratios of 105. Finally, we present a complementary inverter circuit comprising the high-performance n- and p-type FETs based on MoTe2, promoting the application of 2D materials in future electronic systems.

Mobility Extraction in 2D Transition Metal Dichalcogenide Devices-Avoiding Contact Resistance Implicated Overestimation.

Schottky barrier (SB) transistors operate distinctly different from conventional metal-oxide semiconductor field-effect transistors, in a unique way that the gate impacts the carrier injection from the metal source/drain contacts into the channel region. While it has been long recognized that this can have severe implications for device characteristics in the subthreshold region, impacts of contact gating of SB in the on-state of the devices, which affects evaluation of intrinsic channel properties, have been yet comprehensively studied. Due to the fact that contact resistance (RC ) is always gate-dependent in a typical back-gated device structure, the traditional approach of deriving field-effect mobility from the maximum transconductance (gm ) is in principle not correct and can even overestimate the mobility. In addition, an exhibition of two different threshold voltages for the channel and the contact region leads to another layer of complexity in determining the true carrier concentration calculated from Q = COX * (VG -VTH ). Through a detailed experimental analysis, the effect of different effective oxide thicknesses, distinct SB heights, and doping-induced reductions in the SB width are carefully evaluated to gain a better understanding of their impact on important device metrics.

Electric-field induced structural transition in vertical MoTe2- and Mo1-xWxTe2-based resistive memories.

Transition metal dichalcogenides have attracted attention as potential building blocks for various electronic applications due to their atomically thin nature and polymorphism. Here, we report an electric-field-induced structural transition from a 2H semiconducting to a distorted transient structure (2Hd) and orthorhombic Td conducting phase in vertical 2H-MoTe2- and Mo1-xWxTe2-based resistive random access memory (RRAM) devices. RRAM programming voltages are tunable by the transition metal dichalcogenide thickness and show a distinctive trend of requiring lower electric fields for Mo1-xWxTe2 alloys versus MoTe2 compounds. Devices showed reproducible resistive switching within 10 ns between a high resistive state and a low resistive state. Moreover, using an Al2O3/MoTe2 stack, On/off current ratios of 106 with programming currents lower than 1 µA were achieved in a selectorless RRAM architecture. The sum of these findings demonstrates that controlled electrical state switching in two-dimensional materials is achievable and highlights the potential of transition metal dichalcogenides for memory applications.

Vertical versus Lateral Two-Dimensional Heterostructures: On the Topic of Atomically Abrupt p/n-Junctions.

The key appeal of two-dimensional (2D) materials such as graphene, transition metal dichalcogenides (TMDs), or phosphorene for electronic applications certainly lies in their atomically thin nature that offers opportunities for devices beyond conventional transistors. It is also this property that makes them naturally suited for a type of integration that is not possible with any three-dimensional (3D) material, that is, forming heterostructures by stacking dissimilar 2D materials together. Recently, a number of research groups have reported on the formation of atomically sharp p/n-junctions in various 2D heterostructures that show strong diode-type rectification. In this article, we will show that truly vertical heterostructures do exhibit much smaller rectification ratios and that the reported results on atomically sharp p/n-junctions can be readily understood within the framework of the gate and drain voltage response of Schottky barriers that are involved in the lateral transport.

Covalent Nitrogen Doping and Compressive Strain in MoS2 by Remote N2 Plasma Exposure.

Controllable doping of two-dimensional materials is highly desired for ideal device performance in both hetero- and p-n homojunctions. Herein, we propose an effective strategy for doping of MoS2 with nitrogen through a remote N2 plasma surface treatment. By monitoring the surface chemistry of MoS2 upon N2 plasma exposure using in situ X-ray photoelectron spectroscopy, we identified the presence of covalently bonded nitrogen in MoS2, where substitution of the chalcogen sulfur by nitrogen is determined as the doping mechanism. Furthermore, the electrical characterization demonstrates that p-type doping of MoS2 is achieved by nitrogen doping, which is in agreement with theoretical predictions. Notably, we found that the presence of nitrogen can induce compressive strain in the MoS2 structure, which represents the first evidence of strain induced by substitutional doping in a transition metal dichalcogenide material. Finally, our first principle calculations support the experimental demonstration of such strain, and a correlation between nitrogen doping concentration and compressive strain in MoS2 is elucidated.

Tunability of short-channel effects in MoS2 field-effect devices.

MoS2 transistors have been electrically characterized and analyzed in terms of their vulnerability to short channel effects and their response to various environments. We find that the electrical performance of MoS2 flakes is governed by an unexpected dependence on the effective body thickness of the devices that in turn depends on the amount of intercalated water molecules that exist in the layered structure. In particular, a decrease in effective body thickness is observed in air compared to the "water-free" scenario. Moreover, we find that the doping stage of a MoS2 field-effect transistor (FET) is p-type despite the appearance of electron conduction, and the amount of p-doping is higher in air than in vacuum. Most importantly, our results indicate that device characteristics of MoS2 can be substantially impacted by tuning the device electrostatics. This can be accomplished by controlling the effectively active body thickness of the MoS2 FET employing intercalation and engineering of the effective barrier between individual MoS2 layers.

Where does the current flow in two-dimensional layered systems?

In this Letter, we map for the first time the current distribution among the individual layers of multilayer two-dimensional systems. Our findings suggest that in a multilayer MoS2 field-effect transistor the "HOT-SPOT" of the current flow migrates dynamically between the layers as a function of the applied back gate bias and manifests itself in a rather unusual "contact resistance" that cannot be explained using the conventional models for metal-to-semiconductor contacts. To interpret this unique contact resistance, extracted from a channel length scaling study, we employed a resistor network model based on Thomas-Fermi charge screening and interlayer coupling. By modeling our experimental data we have found that the charge screening length for MoS2 is rather large (λMoS2 = 7 nm) and translates into a current distribution in multilayer MoS2 systems, which is distinctly different from the current distribution in multilayer graphene (λgraphene = 0.6 nm). In particular, our experimental results allow us to retrieve for the first time fundamental information about the carrier transport in two-dimensional layered systems that will likely play an important role in the implementation of future electronics components but that have not been evaluated in the past.

Utilizing the unique properties of nanowire MOSFETs for RF applications.

Nanostructures have attracted a great deal of attention because of their potential usefulness for high density applications. More importantly, they offer excellent avenues for improved scaling beyond conventional approaches. Less attention has been paid to their intrinsic potential for distinct circuit applications. Here we discuss how a combination of 1-D transport, operation in the quantum capacitance limit, and ballistic transport can be utilized for certain RF applications. In particular this work explores how the above transport properties can provide a high degree of transconductance linearity at the device level. The article also discusses how device characteristics can be interpreted and analyzed in terms of device linearity if the above conditions are not ideally fulfilled. Using aggressively scaled silicon nanowire field-effect transistors as an example device in this work provides new insights toward the proper choice of channel material to improve linearity through the above-mentioned transport conditions. According to this study, a high degree of linearity occurs feasible while operating at low supply voltages making low-dimensional systems, and here in particular nanowires, an interesting candidate for portable RF applications.

High performance multilayer MoS2 transistors with scandium contacts.

While there has been growing interest in two-dimensional (2-D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancy due to the lack of a complete picture of their performance potential. The focus of this article is on contacts. We demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS(2) layers the excellent intrinsic properties of this 2-D material can be harvested. Using scandium contacts on 10-nm-thick exfoliated MoS(2) flakes that are covered by a 15 nm Al(2)O(3) film, high effective mobilities of 700 cm(2)/(V s) are achieved at room temperature. This breakthrough is largely attributed to the fact that we succeeded in eliminating contact resistance effects that limited the device performance in the past unrecognized. In fact, the apparent linear dependence of current on drain voltage had mislead researchers to believe that a truly Ohmic contact had already been achieved, a misconception that we also elucidate in the present article.

Spin transfer torque in a graphene lateral spin valve assisted by an external magnetic field.

Spin-based devices are widely discussed for post-complementary metal-oxide-semiconductor (CMOS) applications. A number of spin device ideas propose using spin current to carry information coherently through a spin channel and transfering it to an output magnet by spin transfer torque. Graphene is an ideal channel material in this context due to its long spin diffusion length, gate-tunable carrier density, and high carrier mobility. However, spin transfer torque has not been demonstrated in graphene or any other semiconductor material as of yet. Here, we report the first experimental measurement of spin transfer torque in graphene lateral nonlocal spin valve devices. Assisted by an external magnetic field, the magnetization reversal of the ferromagnetic receiving magnet is induced by pure spin diffusion currents from the input magnet. The magnetization switching is reversible between parallel and antiparallel configurations, depending on the polarity of the applied charged current. The presented results are an important step toward developing graphene-based spin logic and understanding spin-transfer torque in systems with tunneling barriers.

Experimental demonstration of an on-chip p-bit core based on stochastic magnetic tunnel junctions and 2D MoS2 transistors.

Probabilistic computing is a computing scheme that offers a more efficient approach than conventional complementary metal-oxide-semiconductor (CMOS)-based logic in a variety of applications ranging from optimization to Bayesian inference, and invertible Boolean logic. The probabilistic bit (or p-bit, the base unit of probabilistic computing) is a naturally fluctuating entity that requires tunable stochasticity; by coupling low-barrier stochastic magnetic tunnel junctions (MTJs) with a transistor circuit, a compact implementation is achieved. In this work, by combining stochastic MTJs with 2D-MoS2 field-effect transistors (FETs), we demonstrate an on-chip realization of a p-bit building block displaying voltage-controllable stochasticity. Supported by circuit simulations, we analyze the three transistor-one magnetic tunnel junction (3T-1MTJ) p-bit design, evaluating how the characteristics of each component influence the overall p-bit output. While the current approach has not reached the level of maturity required to compete with CMOS-compatible MTJ technology, the design rules presented in this work are valuable for future experimental implementations of scaled on-chip p-bit networks with reduced footprint.

Tailoring amorphous boron nitride for high-performance two-dimensional electronics.

Two-dimensional (2D) materials have garnered significant attention in recent years due to their atomically thin structure and unique electronic and optoelectronic properties. To harness their full potential for applications in next-generation electronics and photonics, precise control over the dielectric environment surrounding the 2D material is critical. The lack of nucleation sites on 2D surfaces to form thin, uniform dielectric layers often leads to interfacial defects that degrade the device performance, posing a major roadblock in the realization of 2D-based devices. Here, we demonstrate a wafer-scale, low-temperature process (<250 °C) using atomic layer deposition (ALD) for the synthesis of uniform, conformal amorphous boron nitride (aBN) thin films. ALD deposition temperatures between 125 and 250 °C result in stoichiometric films with high oxidative stability, yielding a dielectric strength of 8.2 MV/cm. Utilizing a seed-free ALD approach, we form uniform aBN dielectric layers on 2D surfaces and fabricate multiple quantum well structures of aBN/MoS2 and aBN-encapsulated double-gated monolayer (ML) MoS2 field-effect transistors to evaluate the impact of aBN dielectric environment on MoS2 optoelectronic and electronic properties. Our work in scalable aBN dielectric integration paves a way towards realizing the theoretical performance of 2D materials for next-generation electronics.

Graphene-based frequency tripler.

Graphene has captured the imagination of researchers worldwide as an ideal two-dimensional material with exceptional electrical transport properties. The high electron and hole mobility quickly inspired scientists to search for electronic applications that require high-performance channel materials. However, the absence of a bandgap in graphene immediately revealed itself in terms of ambipolar device characteristics and the nonexistence of a device off-state. The question is: How can the superior electronic properties of graphene be harvested while dealing appropriately with its unique characteristics rather than enforcing conventional device concepts? Here, we report a novel device idea, a graphene-based frequency tripler, an application that employs an innovative electrostatic doping approach and exploits the unique ambipolar behavior of graphene.

Observation of 1D behavior in Si nanowires: toward high-performance TFETs.

This article provides experimental evidence of one-dimensional behavior of silicon (Si) nanowires (NWs) at low-temperature through both transfer (I(d)-V(G)) and capacitance-voltage characteristics. For the first time, operation of Si NWs in the quantum capacitance limit (QCL) is experimentally demonstrated and quantitatively analyzed. This is of relevance since working in the QCL may allow, e.g., tunneling field-effect transistors (TFETs) to achieve higher on-state currents (I(on)) and larger on-/off-state current ratios (I(on)/I(off)), thus addressing one of the most severe limitations of TFETs. Comparison of the experimental data with simulations finds excellent agreement using a simple capacitor model.

Understanding the impact of Schottky barriers on the performance of narrow bandgap nanowire field effect transistors.

Semiconductor nanowires have been explored as alternative electronic materials for high performance device applications exhibiting low power consumption specs. Electrical transport in III-V nanowire (NW) field-effect transistors (FETs) is frequently governed by Schottky barriers between the source/drain and the NW channel. Consequently the device performance is greatly impacted by the contacts. Here we present a simple model that explains how ambipolar device characteristics of NW-FETs and in particular the achievable on/off current ratio can be analyzed to gain a detailed idea of (a) the bandgap of the synthesized NWs and (b) the potential performance of various NW materials. In particular, we compare the model with our own transport measurements on InSb and InAs NW-FETs as well as results published by other groups. The analysis confirms excellent agreement with the predictions of the model, highlighting the potential of our approach to understand novel NW based materials and devices and to bridge material development and device applications.

Synthesis of antimony-based nanowires using the simple vapor deposition method.

III-V nanowires have attracted plenty of attention because of their potential outstanding performance in a wide range of applications. However, compared to other III-V nanowires, the synthesis of high quality Sb-based nanowires is less developed, which obstructs the progress towards further applications. In this study we report high quality GaSb and InSb nanowires synthesized by a simple vapor deposition method. Epitaxial growth of nanowires on growth substrates is demonstrated. Te doped GaSb nanowires are achieved through in situ doping during the vapor deposition process. Electrical measurements of nanowire field-effect transistors show high performance of the synthesized InSb nanowires.

FeTRAM. An organic ferroelectric material based novel random access memory cell.

Science and technology in the electronics area have always been driven by the development of materials with unique properties and their integration into novel device concepts with the ultimate goal to enable new functionalities in innovative circuit architectures. In particular, a shift in paradigm requires a synergistic approach that combines materials, devices and circuit aspects simultaneously. Here we report the experimental implementation of a novel nonvolatile memory cell that combines silicon nanowires with an organic ferroelectric polymer-PVDF-TrFE-into a new ferroelectric transistor architecture. Our new cell, the ferroelectric transistor random access memory (FeTRAM) exhibits similarities with state-of-the-art ferroelectric random access memories (FeRAMs) in that it utilizes a ferroelectric material to store information in a nonvolatile (NV) fashion but with the added advantage of allowing for nondestructive readout. This nondestructive readout is a result of information being stored in our cell using a ferroelectric transistor instead of a capacitor-the scheme commonly employed in conventional FeRAMs.

Transport modulation in Ge/Si core/shell nanowires through controlled synthesis of doped Si shells.

Appropriately controlling the properties of the Si shell in Ge/Si core/shell nanowires permits not only passivation of the Ge surface states, but also introduces new interface phenomena, thereby enabling novel nanoelectronics concepts. Here, we report a rational synthesis of Ge/Si core/shell nanowires with doped Si shells. We demonstrate that the morphology and thickness of Si shells can be controlled for different dopant types by tuning the growth parameters during synthesis. We also present distinctly different electrical characteristics that arise from nanowire field-effect transistors fabricated using the synthesized Ge/Si core/shell nanowires with different shell morphologies. Furthermore, a clear transition in the modification of device characteristics is observed for crystalline shell nanowires following removal of the shell using a unique trimming process of successive native oxide formation/etching. Our results demonstrate that the preferred transport path through the nanowire structure can be modulated by appropriately tuning the growth conditions.

Signatures of disorder in the minimum conductivity of graphene.

Graphene has been proposed as a promising material for future nanoelectronics because of its unique electronic properties. Understanding the scaling behavior of this new nanomaterial under common experimental conditions is of critical importance for developing graphene-based nanoscale devices. We present a comprehensive experimental and theoretical study on the influence of edge disorder and bulk disorder on the minimum conductivity of graphene ribbons. For the first time, we discovered a strong nonmonotonic size scaling behavior featuring a peak and saturation minimum conductivity. Through extensive numerical simulations and analysis, we are able to attribute these features to the amount of edge and bulk disorder in graphene devices. This study elucidates the quantum transport mechanisms in realistic experimental graphene systems, which can be used as a guideline for designing graphene-based nanoscale devices with improved performance.

Statistical Assessment of High-Performance Scaled Double-Gate Transistors from Monolayer WS2.

Scaling of monolayer transition metal dichalcogenide (TMD) field-effect transistors (FETs) is an important step toward evaluating the application space of TMD materials. Although some work on ultrashort channel monolayer (ML) TMD FETs has been published, there exist no comprehensive studies that assess their performance in a statistically relevant manner, providing critical insights into the impact of the device geometry. Part of the reason for the absence of such a study is the substantial variability of TMD devices when processes are not carefully controlled. In this work, we show a statistical study of ultrashort channel double-gated ML WS2 FETs exhibiting excellent device performance and limited device-to-device variations. From a detailed analysis of cross-sectional scanning transmission electron microscopy (STEM) images and careful technology computer aided design (TCAD) simulations, we evaluated, in particular, an unexpected deterioration of the subthreshold characteristics for our shortest devices. Two potential candidates for the observed behavior were identified, i.e., buckling of the TMD on the substrate and loss of gate control due to the source geometry and the high-k dielectric between the metal gate and the metal source electrode.