Ambipolar charge-transfer graphene plasmonic cavities.

Plasmon polaritons in van der Waals materials hold promise for various photonics applications1-4. The deterministic imprinting of spatial patterns of high carrier density in plasmonic cavities and nanoscale circuitry can enable the realization of advanced nonlinear nanophotonic5 and strong light-matter interaction platforms6. Here we demonstrate an oxidation-activated charge transfer strategy to program ambipolar low-loss graphene plasmonic structures. By covering graphene with transition-metal dichalcogenides and subsequently oxidizing the transition-metal dichalcogenides into transition-metal oxides, we activate charge transfer rooted in the dissimilar work functions between transition-metal oxides and graphene. Nano-infrared imaging reveals ambipolar low-loss plasmon polaritons at the transition-metal-oxide/graphene interfaces. Further, by inserting dielectric van der Waals spacers, we can precisely control the electron and hole densities induced by oxidation-activated charge transfer and achieve plasmons with a near-intrinsic quality factor. Using this strategy, we imprint plasmonic cavities with laterally abrupt doping profiles with nanoscale precision and demonstrate plasmonic whispering-gallery resonators based on suspended graphene encapsulated in transition-metal oxides.

Self-Aligned Top-Gate Structure in High-Performance 2D p-FETs via van der Waals Integration and Contact Spacer Doping.

The potential of 2D materials in future CMOS technology is hindered by the lack of high-performance p-type field effect transistors (p-FETs). While utilization of the top-gate (TG) structure with a p-doped spacer area offers a solution to this challenge, the design and device processing to form gate stacks pose serious challenges in realization of ideal p-FETs and PMOS inverters. This study presents a novel approach to address these challenges by fabricating lateral p+-p-p+ junction WSe2 FETs with self-aligned TG stacks in which desired junction is formed by van der Waals (vdW) integration and selective oxygen plasma-doping into spacer regions. The exceptional electrostatic controllability with a high on/off current ratio and small subthreshold swing (SS) of plasma doped p-FETs is achieved with the self-aligned metal/hBN gate stacks. To demonstrate the effectiveness of our approach, we construct a PMOS inverter using this device architecture, which exhibits a remarkably low power consumption of approximately 4.5 nW.

Advances and Applications of Oxidized van der Waals Transition Metal Dichalcogenides.

The surface oxidation of 2D transition metal dichalcogenides (TMDs) has recently gained tremendous technological and fundamental interest owing to the multi-functional properties that the surface oxidized layer opens up. In particular, when integrated into other 2D materials in the form of van der Waals heterostructures, oxidized TMDs enable designer properties, including novel electronic states, engineered light-matter interactions, and exceptional-point singularities, among many others. Here, the evolving landscapes of the state-of-the-art surface engineering technologies that enable controlled oxidation of TMDs down to the monolayer-by-monolayer limit are reviewed. Next, the use of oxidized TMDs in van der Waals heterostructures for different electronic and photonic device platforms, materials growth processes, engineering concepts, and synthesizing new condensed matter phenomena is discussed. Finally, challenges and outlook for future impact of oxidized TMDs in driving rapid advancements across various application fronts is discussed.

Modulation of Contact Resistance of Dual-Gated MoS2 FETs Using Fermi-Level Pinning-Free Antimony Semi-Metal Contacts.

Achieving low contact resistance (RC ) is one of the major challenges in producing 2D FETs for future CMOS technology applications. In this work, the electrical characteristics for semimetal (Sb) and normal metal (Ti) contacted MoS2 devices are systematically analyzed as a function of top and bottom gate-voltages (VTG and VBG ). The semimetal contacts not only significantly reduce RC but also induce a strong dependence of RC on VTG , in sharp contrast to Ti contacts that only modulate RC by varying VBG . The anomalous behavior is attributed to the strongly modulated pseudo-junction resistance (Rjun ) by VTG , resulting from weak Fermi level pinning (FLP) of Sb contacts. In contrast, the resistances under both metallic contacts remain unchanged by VTG as metal screens the electric field from the applied VTG . Technology computer aided design simulations further confirm the contribution of VTG to Rjun , which improves overall RC of Sb-contacted MoS2 devices. Consequently, the Sb contact has a distinctive merit in dual-gated (DG) device structure, as it greatly reduces RC and enables effective gate control by both VBG and VTG . The results offer new insight into the development of DG 2D FETs with enhanced contact properties realized by using semimetals.

Fermi Level Pinning Dependent 2D Semiconductor Devices: Challenges and Prospects.

Motivated by the high expectation for efficient electrostatic modulation of charge transport at very low voltages, atomically thin 2D materials with a range of bandgaps are investigated extensively for use in future semiconductor devices. However, researchers face formidable challenges in 2D device processing mainly originated from the out-of-plane van der Waals (vdW) structure of ultrathin 2D materials. As major challenges, untunable Schottky barrier height and the corresponding strong Fermi level pinning (FLP) at metal interfaces are observed unexpectedly with 2D vdW materials, giving rise to unmodulated semiconductor polarity, high contact resistance, and lowered device mobility. Here, FLP observed from recently developed 2D semiconductor devices is addressed differently from those observed from conventional semiconductor devices. It is understood that the observed FLP is attributed to inefficient doping into 2D materials, vdW gap present at the metal interface, and hybridized compounds formed under contacting metals. To provide readers with practical guidelines for the design of 2D devices, the impact of FLP occurring in 2D semiconductor devices is further reviewed by exploring various origins responsible for the FLP, effects of FLP on 2D device performances, and methods for improving metallic contact to 2D materials.

Recent Progress in 1D Contacts for 2D-Material-Based Devices.

Recent studies have intensively examined 2D materials (2DMs) as promising materials for use in future quantum devices due to their atomic thinness. However, a major limitation occurs when 2DMs are in contact with metals: a van der Waals (vdW) gap is generated at the 2DM-metal interfaces, which induces metal-induced gap states that are responsible for an uncontrollable Schottky barrier (SB), Fermi-level pinning (FLP), and high contact resistance (RC ), thereby substantially lowering the electronic mobility of 2DM-based devices. Here, vdW-gap-free 1D edge contact is reviewed for use in 2D devices with substantially suppressed carrier scattering of 2DMs with hexagonal boron nitride (hBN) encapsulation. The 1D contact further enables uniform carrier transport across multilayered 2DM channels, high-density transistor integration independent of scaling, and the fabrication of double-gate transistors suitable for demonstrating unique quantum phenomena of 2DMs. The existing 1D contact methods are reviewed first. As a promising technology toward the large-scale production of 2D devices, seamless lateral contacts are reviewed in detail. The electronic, optoelectronic, and quantum devices developed via 1D contacts are subsequently discussed. Finally, the challenges regarding the reliability of 1D contacts are addressed, followed by an outlook of 1D contact methods.

Selective Electron Beam Patterning of Oxygen-Doped WSe2 for Seamless Lateral Junction Transistors.

Surface charge transfer doping (SCTD) using oxygen plasma to form a p-type dopant oxide layer on transition metal dichalcogenide (TMDs) is a promising doping technique for 2D TMDs field-effect transistors (FETs). However, patternability of SCTD is a key challenge to effectively switch FETs. Herein, a simple method to selectively pattern degenerately p-type (p+ )-doped WSe2 FETs via electron beam (e-beam) irradiation is reported. The effect of the selective e-beam irradiation is confirmed by the gate-tunable optical responses of seamless lateral p+ -p diodes. The OFF state of the devices by inducing trapped charges via selective e-beam irradiation onto a desired channel area in p+ -doped WSe2 , which is in sharp contrast to globally p+ -doped WSe2 FETs, is realized. Selective e-beam irradiation of the PMMA-passivated p+ -WSe2 enables accurate control of the threshold voltage (Vth ) of WSe2 devices by varying the pattern size and e-beam dose, while preserving the low contact resistance. By utilizing hBN as the gate dielectric, high-performance WSe2 p-FETs with a saturation current of -280 µA µm-1 and on/off ratio of 109 are achieved. This study's technique demonstrates a facile approach to obtain high-performance TMD p-FETs by e-beam irradiation, enabling efficient switching and patternability toward various junction devices.

Damage-Free Atomic Layer Etch of WSe2: A Platform for Fabricating Clean Two-Dimensional Devices.

The development of a controllable, selective, and repeatable etch process is crucial for controlling the layer thickness and patterning of two-dimensional (2D) materials. However, the atomically thin dimensions and high structural similarity of different 2D materials make it difficult to adapt conventional thin-film etch processes. In this work, we propose a selective, damage-free atomic layer etch (ALE) that enables layer-by-layer removal of monolayer WSe2 without altering the physical, optical, and electronic properties of the underlying layers. The etch uses a top-down approach where the topmost layer is oxidized in a self-limited manner and then removed using a selective etch. Using a comprehensive set of material, optical, and electrical characterization, we show that the quality of our ALE processed layers is comparable to that of pristine layers of similar thickness. The ALE processed WSe2 layers preserve their bright photoluminescence characteristics and possess high room-temperature hole mobilities of 515 cm2/V·s, essential for fabricating high-performance 2D devices. Further, using graphene as a testbed, we demonstrate the fabrication of ultra-clean 2D devices using a sacrificial monolayer WSe2 layer to protect the channel during processing, which is etched in the final process step in a technique we call sacrificial WSe2 with ALE processing (SWAP). The graphene transistors made using the SWAP technique demonstrate high room-temperature field-effect mobilities, up to 200,000 cm2/V·s, better than previously reported unencapsulated graphene devices.

Fermi Level Pinning at Electrical Metal Contacts of Monolayer Molybdenum Dichalcogenides.

Electrical metal contacts to two-dimensional (2D) semiconducting transition metal dichalcogenides (TMDCs) are found to be the key bottleneck to the realization of high device performance due to strong Fermi level pinning and high contact resistances (Rc). Until now, Fermi level pinning of monolayer TMDCs has been reported only theoretically, although that of bulk TMDCs has been reported experimentally. Here, we report the experimental study on Fermi level pinning of monolayer MoS2 and MoTe2 by interpreting the thermionic emission results. We also quantitatively compared our results with the theoretical simulation results of the monolayer structure as well as the experimental results of the bulk structure. We measured the pinning factor S to be 0.11 and -0.07 for monolayer MoS2 and MoTe2, respectively, suggesting a much stronger Fermi level pinning effect, a Schottky barrier height (SBH) lower than that by theoretical prediction, and interestingly similar pinning energy levels between monolayer and bulk MoS2. Our results further imply that metal work functions have very little influence on contact properties of 2D-material-based devices. Moreover, we found that Rc is exponentially proportional to SBH, and these processing parameters can be controlled sensitively upon chemical doping into the 2D materials. These findings provide a practical guideline for depinning Fermi level at the 2D interfaces so that polarity control of TMDC-based semiconductors can be achieved efficiently.

Electrically Driven Reversible Phase Changes in Layered In2 Se3 Crystalline Film.

An unconventional phase-change memory (PCM) made of In2 Se3 , which utilizes reversible phase changes between a low-resistance crystalline ß phase and a high-resistance crystalline γ phase is reported for the first time. Using a PCM with a layered crystalline film exfoliated from In2 Se3 crystals on a graphene bottom electrode, it is shown that SET/RESET programmed states form via the formation/annihilation of periodic van der Waals' (vdW) gaps (i.e., virtual vacancy layers) in the stack of atomic layers and the concurrent reconfiguration of In and Se atoms across the layers. From density functional theory calculations, ß and γ phases, characterized by octahedral bonding with vdW gaps and tetrahedral bonding without vdW gaps, respectively, are shown to have energy bandgap value of 0.78 and 1.86 eV, consistent with a metal-to-insulator transition accompanying the ß-to-γ phase change. The monolithic In2 Se3 layered film reported here provides a novel means to achieving a PCM based on melting-free, low-entropy phase changes in contrast with the GeTe-Sb2 Te3 superlattice film adopted in interfacial phase-change memory.

Passivated ambipolar black phosphorus transistors.

We report the first air-passivated ambipolar BP transistor formed by applying benzyl viologen, which serves as a surface charge transfer donor for BP flakes. The passivated BP devices exhibit excellent stability under both an ambient atmosphere and vacuum; their transistor performance is maintained semi-permanently. Unlike their intrinsic p-type properties, passivated BP devices present advantageous ambipolar properties with much higher electron mobility up to ∼83 cm(2) V(-1) s(-1) from 2-terminal measurement at 300 K, compared to other reported studies on n-type BP transistors. On the basis of the n-type doping effect that originated from benzyl viologen, we also systematically investigated the BP thickness dependence of our devices on electrical properties, in which we found the best electron transport performance to be attained when an ∼10 nm thick BP flake was used.

Carrier transport at the metal-MoS2 interface.

This study illustrates the nature of electronic transport and its transition from one mechanism to another between a metal electrode and MoS2 channel interface in a field effect transistor (FET) device. Interestingly, measurements of the contact resistance (Rc) as a function of temperature indicate a transition in the carrier transport across the energy barrier from thermionic emission at a high temperature to tunneling at a low temperature. Furthermore, at a low temperature, the nature of the tunneling behavior is ascertained by the current-voltage dependency that helps us feature direct tunneling at a low bias and Fowler-Nordheim tunneling at a high bias for a Pd-MoS2 contact due to the effective barrier shape modulation by biasing. In contrast, only direct tunneling is observed for a Cr-MoS2 contact over the entire applied bias range. In addition, simple analytical calculations were carried out to extract Rc at the gating range, and the results are consistent with the experimental data. Our results describe the transition in carrier transport mechanisms across a metal-MoS2 interface, and this information provides guidance for the design of future flexible, transparent electronic devices based on 2-dimensional materials.

Lateral MoS2 p-n junction formed by chemical doping for use in high-performance optoelectronics.

This paper demonstrates a technique to form a lateral homogeneous 2D MoS2 p-n junction by partially stacking 2D h-BN as a mask to p-dope MoS2. The fabricated lateral MoS2 p-n junction with asymmetric electrodes of Pd and Cr/Au displayed a highly efficient photoresponse (maximum external quantum efficiency of ∼7000%, specific detectivity of ∼5 × 10(10) Jones, and light switching ratio of ∼10(3)) and ideal rectifying behavior. The enhanced photoresponse and generation of open-circuit voltage (VOC) and short-circuit current (ISC) were understood to originate from the formation of a p-n junction after chemical doping. Due to the high photoresponse at low VD and VG attributed to its built-in potential, our MoS2 p-n diode made progress toward the realization of low-power operating photodevices. Thus, this study suggests an effective way to form a lateral p-n junction by the h-BN hard masking technique and to improve the photoresponse of MoS2 by the chemical doping process.

Metal-semiconductor barrier modulation for high photoresponse in transition metal dichalcogenide field effect transistors.

A gate-controlled metal-semiconductor barrier modulation and its effect on carrier transport were investigated in two-dimensional (2D) transition metal dichalcogenide (TMDC) field effect transistors (FETs). A strong photoresponse was observed in both unipolar MoS2 and ambipolar WSe2 FETs (i) at the high drain voltage due to a high electric field along the channel for separating photo-excited charge carriers and (ii) at the certain gate voltage due to the optimized barriers for the collection of photo-excited charge carriers at metal contacts. The effective barrier height between Ti/Au and TMDCs was estimated by a low temperature measurement. An ohmic contact behavior and drain-induced barrier lowering (DIBL) were clearly observed in MoS2 FET. In contrast, a Schottky-to-ohmic contact transition was observed in WSe2 FET as the gate voltage increases, due to the change of majority carrier transport from holes to electrons. The gate-dependent barrier modulation effectively controls the carrier transport, demonstrating its great potential in 2D TMDCs for electronic and optoelectronic applications.

Controlled charge trapping by molybdenum disulphide and graphene in ultrathin heterostructured memory devices.

Atomically thin two-dimensional materials have emerged as promising candidates for flexible and transparent electronic applications. Here we show non-volatile memory devices, based on field-effect transistors with large hysteresis, consisting entirely of stacked two-dimensional materials. Graphene and molybdenum disulphide were employed as both channel and charge-trapping layers, whereas hexagonal boron nitride was used as a tunnel barrier. In these ultrathin heterostructured memory devices, the atomically thin molybdenum disulphide or graphene-trapping layer stores charge tunnelled through hexagonal boron nitride, serving as a floating gate to control the charge transport in the graphene or molybdenum disulphide channel. By varying the thicknesses of two-dimensional materials and modifying the stacking order, the hysteresis and conductance polarity of the field-effect transistor can be controlled. These devices show high mobility, high on/off current ratio, large memory window and stable retention, providing a promising route towards flexible and transparent memory devices utilizing atomically thin two-dimensional materials.

Flexible and transparent MoS2 field-effect transistors on hexagonal boron nitride-graphene heterostructures.

Atomically thin forms of layered materials, such as conducting graphene, insulating hexagonal boron nitride (hBN), and semiconducting molybdenum disulfide (MoS2), have generated great interests recently due to the possibility of combining diverse atomic layers by mechanical "stacking" to create novel materials and devices. In this work, we demonstrate field-effect transistors (FETs) with MoS2 channels, hBN dielectric, and graphene gate electrodes. These devices show field-effect mobilities of up to 45 cm(2)/Vs and operating gate voltage below 10 V, with greatly reduced hysteresis. Taking advantage of the mechanical strength and flexibility of these materials, we demonstrate integration onto a polymer substrate to create flexible and transparent FETs that show unchanged performance up to 1.5% strain. These heterostructure devices consisting of ultrathin two-dimensional (2D) materials open up a new route toward high-performance flexible and transparent electronics.