Wurtzite InP microdisks: from epitaxy to room-temperature lasing.

Metastable wurtzite crystal phases of conventional semiconductors comprise enormous potential for high-performance electro-optical devices, owed to their extended tunable direct band gap range. However, synthesizing these materials in good quality and beyond nanowire size constraints has remained elusive. In this work, the epitaxy of wurtzite InP microdisks and related geometries on insulator for advanced optical applications is explored. This is achieved by an elaborate combination of selective area growth of fins and a zipper-induced epitaxial lateral overgrowth, which enables co-integration of diversely shaped crystals at precise position. The grown material possesses high phase purity and excellent optical quality characterized by STEM and µ-PL. Optically pumped lasing at room temperature is achieved in microdisks with a lasing threshold of 365 µJ cm-2. Our platform could provide novel geometries for photonic applications.

Shape-memory effect in twisted ferroic nanocomposites.

The shape recovery ability of shape-memory alloys vanishes below a critical size (~50 nm), which prevents their practical applications at the nanoscale. In contrast, ferroic materials, even when scaled down to dimensions of a few nanometers, exhibit actuation strain through domain switching, though the generated strain is modest (~1%). Here, we develop freestanding twisted architectures of nanoscale ferroic oxides showing shape-memory effect with a giant recoverable strain (>8%). The twisted geometrical design amplifies the strain generated during ferroelectric domain switching, which cannot be achieved in bulk ceramics or substrate-bonded thin films. The twisted ferroic nanocomposites allow us to overcome the size limitations in traditional shape-memory alloys and open new avenues in engineering large-stroke shape-memory materials for small-scale actuating devices such as nanorobots and artificial muscle fibrils.

Electrodeposition as an Alternative Approach for Monolithic Integration of InSb on Silicon.

High-performance electronics would greatly benefit from a versatile III-V integration process on silicon. Unfortunately, integration using hetero epitaxy is hampered by polarity, lattice, and thermal expansion mismatch. This work proposes an alternative concept of III-V integration combining advantages of pulse electrodeposition, template-assisted selective epitaxy, and recrystallization from a melt. Efficient electrodeposition of nano-crystalline and stochiometric InSb in planar templates on Si (001) is achieved. The InSb deposits are analysed by high resolution scanning transmission electron microscopy (HR-STEM) and energy-dispersive X-ray spectroscopy (EDX) before and after melting and recrystallization. The results show that InSb can crystallise epitaxially on Si with the formation of stacking faults. Furthermore, X-ray photoelectron (XPS) and Auger electron (AE) spectroscopy analysis indicate that the InSb crystal size is limited by the impurity concentration resulting from the electrodeposition process.

Electro-optic phase modulation in ridge waveguides of epitaxial K(0.95)Na(0.05)Ta(0.71)Nb(0.29)O(3) thin films.

Electro-optic modulation at lambda=1.5 mum has been demonstrated for the first time to the best of our knowledge in a ridge waveguide phase modulator produced in cubic potassium sodium tantalate niobate thin films epitaxially grown on potassium tantalate substrates exploiting the large quadratic electro-optic Kerr coefficient of R11 = 8.2x10(-17) m(2)/V(2). The relative permittivity, Kerr coefficient, and refractive index have been evaluated for the thin film crystal and are compared to the values measured in bulk crystals. The half-wave voltage times length figure of merit of the modulator has been measured to be Vpil=38 Vcm at room temperature.

Sub-10 Nanometer Feature Size in Silicon Using Thermal Scanning Probe Lithography.

High-resolution lithography often involves thin resist layers which pose a challenge for pattern characterization. Direct evidence that the pattern was well-defined and can be used for device fabrication is provided if a successful pattern transfer is demonstrated. In the case of thermal scanning probe lithography (t-SPL), highest resolutions are achieved for shallow patterns. In this work, we study the transfer reliability and the achievable resolution as a function of applied temperature and force. Pattern transfer was reliable if a pattern depth of more than 3 nm was reached and the walls between the patterned lines were slightly elevated. Using this geometry as a benchmark, we studied the formation of 10-20 nm half-pitch dense lines as a function of the applied force and temperature. We found that the best pattern geometry is obtained at a heater temperature of ∼600 °C, which is below or close to the transition from mechanical indentation to thermal evaporation. At this temperature, there still is considerable plastic deformation of the resist, which leads to a reduction of the pattern depth at tight pitch and therefore limits the achievable resolution. By optimizing patterning conditions, we achieved 11 nm half-pitch dense lines in the HM8006 transfer layer and 14 nm half-pitch dense lines and L-lines in silicon. For the 14 nm half-pitch lines in silicon, we measured a line edge roughness of 2.6 nm (3σ) and a feature size of the patterned walls of 7 nm.