Physics, Structures, and Applications of Fluorite-Structured Ferroelectric Tunnel Junctions.

The interest in ferroelectric tunnel junctions (FTJ) has been revitalized by the discovery of ferroelectricity in fluorite-structured oxides such as HfO2 and ZrO2 . In terms of thickness scaling, CMOS compatibility, and 3D integration, these fluorite-structured FTJs provide a number of benefits over conventional perovskite-based FTJs. Here, recent developments involving all FTJ devices with fluorite structures are examined. The transport mechanism of fluorite-structured FTJs is explored and contrasted with perovskite-based FTJs and other 2-terminal resistive switching devices starting with the operation principle and essential parameters of the tunneling electroresistance effect. The applications of FTJs, such as neuromorphic devices, logic-in-memory, and physically unclonable function, are then discussed, along with several structural approaches to fluorite-structure FTJs. Finally, the materials and device integration difficulties related to fluorite-structure FTJ devices are reviewed. The purpose of this review is to outline the theories, physics, fabrication processes, applications, and current difficulties associated with fluorite-structure FTJs while also describing potential future possibilities for optimization.

The effect of the bottom electrode on ferroelectric tunnel junctions based on CMOS-compatible HfO2.

Ferroelectric tunnel junctions (FTJs) have attracted research interest as promising candidates for non-destructive readout non-volatile memories. Unlike conventional perovskite FTJs, hafnia FTJs offer many advantages in terms of scalability and CMOS compatibility. However, so far, hafnia FTJs have shown poor endurance and relatively low resistance ratios and these have remained issues for real device applications. In our study, we fabricated HfZrO(HZO)-based FTJs with various electrodes (TiN, Si, SiGe, Ge) and improved the memory performance of HZO-based FTJs by using the asymmetry of the charge screening lengths of the electrodes. For the HZO-based FTJ with a Ge substrate, the effective barrier afforded by this FTJ can be electrically modulated because of the space charge-limited region formed at the ferroelectric/semiconductor interface. The optimized HZO-based FTJ with a Ge bottom electrode presents excellent ferroelectricity with a high remnant polarization of 18 µC cm-2, high tunneling electroresistance value of 30, good retention at 85 °C and high endurance of 107. The results demonstrate the great potential of HfO2-based FTJs in non-destructive readout non-volatile memories.

Analog reservoir computing via ferroelectric mixed phase boundary transistors.

Analog reservoir computing (ARC) systems have attracted attention owing to their efficiency in processing temporal information. However, the distinct functionalities of the system components pose challenges for hardware implementation. Herein, we report a fully integrated ARC system that leverages material versatility of the ferroelectric-to-mixed phase boundary (MPB) hafnium zirconium oxides integrated onto indium-gallium-zinc oxide thin-film transistors (TFTs). MPB-based TFTs (MPBTFTs) with nonlinear short-term memory characteristics are utilized for physical reservoirs and artificial neuron, while nonvolatile ferroelectric TFTs mimic synaptic behavior for readout networks. Furthermore, double-gate configuration of MPBTFTs enhances reservoir state differentiation and state expansion for physical reservoir and processes both excitatory and inhibitory pulses for neuronal functionality with minimal hardware burden. The seamless integration of ARC components on a single wafer executes complex real-world time-series predictions with a low normalized root mean squared error of 0.28. The material-device co-optimization proposed in this study paves the way for the development of area- and energy-efficient ARC systems.

Flexible Ferroelectric Hafnia-Based Synaptic Transistor by Focused-Microwave Annealing.

Hafnia-based ferroelectric memory devices with excellent ferroelectricity, low power consumption, and fast operation speed have attracted considerable interest with the ever-growing desire for nonvolatile memory in flexible electronics. However, hafnia films are required to perform a high temperature (>500 °C) annealing process for crystallization into the ferroelectric orthorhombic phase. It can hinder the integration of hafnia ferroelectric films on flexible substrates including plastic and polymer, which are not endurable at high temperatures above 300 °C. Here, we propose the extremely low-temperature (∼250 °C) process for crystallization of Hf0.5Zr0.5O2 (HZO) thin films by applying a focused-microwave induced annealing method. HZO thin films on a flexible mica substrate exhibits robust remnant polarization (2Pr ∼ 50 µC/cm2), which is negligibly changed under bending tests. In addition, the electrical characteristics of a HZO capacitor on the mica substrate were evaluated, and ferroelectric thin film transistors (Fe-TFTs), using a HZO gate insulator, were fabricated on mica substrates for flexible synapse applications. Symmetric potentiation and depression characteristics are successfully demonstrated in the Fe-TFT memory devices, and the synaptic devices result in high recognition accuracy of 91.44%. The low-temperature annealing method used in this work are promising for forming hafnia-based Fe-TFT memory devices as a building block on a flexible platform.

Selector-less Ferroelectric Tunnel Junctions by Stress Engineering and an Imprinting Effect for High-Density Cross-Point Synapse Arrays.

In the quest for highly scalable and three-dimensional (3D) stackable memory components, ferroelectric tunnel junction (FTJ) crossbar architectures are promising technologies for nonvolatile logic and neuromorphic computing. Most FTJs, however, require additional nonlinear devices to suppress sneak-path current, limiting large-scale arrays in practical applications. Moreover, the giant tunneling electroresistance (TER) remains challenging due to their inherent weak polarization. Here, we present that the employment of a diffusion barrier layer as well as a bottom metal electrode having a significantly low thermal expansion coefficient has been identified as an important way to enhance the strain, stabilize the ferroelectricity, and manage the leakage current in ultrathin hafnia film, achieving a high TER of 100, negligible resistance changes even up to 108 cycles, and a high switching speed of a few tens of nanoseconds. Also, we demonstrate that the usage of an imprinting effect in a ferroelectric capacitor induced by an ionized oxygen vacancy near the electrode results in highly asymmetric current-voltage characteristics with a rectifying ratio of 1000. Notably, the proposed FTJ exhibits a high density array size (>4k) with a securing read margin of 10%. These findings provide a guideline for the design of high-performance and selector-free FTJ devices for large-scale crossbar arrays in neuromorphic applications.

Excellent Reliability and High-Speed Antiferroelectric HfZrO2 Tunnel Junction by a High-Pressure Annealing Process and Built-In Bias Engineering.

Hafnia-based ferroelectric tunnel junctions (FTJs) have great potential for use in logic in nonvolatile memory because of their complementary metal-oxide-semiconductor process compatibility, low power consumption, high scalability, and nondestructive readout. However, typically, ferroelectrics have a depolarization field, resulting in poor endurance owing to the early dielectric breakdown. Herein, an outstandingly reliable and high-speed antiferroelectric HfZrO tunnel junction (AFTJ) is probed to understand whether it is a promising candidate for next-generation nonvolatile memory applications. High-reliability AFTJ can be explained by less charge injection due to the low depolarized field. The formation of two stable nonvolatile states, even with antiferroelectric materials, is possible if asymmetric work function electrodes and fixed oxide charges are employed, generating a built-in bias and shifting the polarization-voltage curve. In addition, via high-pressure annealing, a critical voltage that determines the transition from the t-phase to the o-phase is effectively reduced (22%). The AFTJ shows a higher endurance property (>109 cycles) and faster switching speed (<30 ns) than FTJ. Hence, it is proposed that with the help of internal bias modulation and high-pressure annealing, AFTJs can be employed in next-generation memory devices.

Oxygen vacancy control as a strategy to achieve highly reliable hafnia ferroelectrics using oxide electrode.

Recently, hafnia ferroelectrics with two spontaneous polarization states have attracted marked attention for non-volatile, super-steep switching devices, and neuromorphic application due to their fast switching, scalability, and CMOS compatibility. However, field cycling-induced instabilities are a serious obstacle in the practical application of various low-power electronic devices that require a settled characteristic of polarization hysteresis. In this work, a large reduction in the field cycling-induced instabilities and significantly improved ferroelectric properties were observed in a Hf0.5Zr0.5O2 (HZO) thin film with a RuO2 oxide electrode. The oxide electrode can supply additional oxygen to the HZO film, consequently minimizing the oxygen vacancies at the interface which is the origin of low reliability. From the material and electrical analysis results, we verified that HZO with the RuO2 electrode has less non-ferroelectric dead layers and fewer oxygen vacancies at the interface, resulting in excellent switching properties and improved reliability. This result suggests a beneficial method to produce high-quality hafnia thin films free from interfacial defects and with stable field cycling electrical properties for actual applications.

Defects and Charge-Trapping Mechanisms of Double-Active-Layer In-Zn-O and Al-Sn-Zn-In-O Thin-Film Transistors.

Active matrix organic light-emitting diodes (AMOLEDs) are considered to be a core component of next-generation display technology, which can be used for wearable and flexible devices. Reliable thin-film transistors (TFTs) with high mobility are required to drive AMOLEDs. Recently, amorphous oxide TFTs, due to their high mobility, have been considered as excellent substitutes for driving AMOLEDs. However, the device instabilities of high-mobility oxide TFTs have remained a key issue to be used in production. In this paper, we present the charge-trapping and device instability mechanisms of high-mobility oxide TFTs with double active layers, using In-Zn-O (IZO) and Al-doped Sn-Zn-In-O (ATZIO) with various interfacial IZO thicknesses (0-6 nm). To this end, we employed microsecond fast current-voltage (I-V), single-pulsed I-V, transient current, and discharge current analysis. These alternating-current device characterization methodologies enable the extraction of various trap parameters and defect densities as well as the understanding of dynamic charge transport in double-active-layer TFTs. The results show that the number of defect sites decreases with an increase in the interfacial IZO thickness. From these results, we conclude that the interfacial IZO layer plays a crucial role in minimizing charge trapping in ATZIO TFTs.

Efficient Suppression of Defects and Charge Trapping in High Density In-Sn-Zn-O Thin Film Transistor Prepared using Microwave-Assisted Sputter.

Amorphous oxide semiconductor-based thin film transistors (TFTs) have been considered as excellent switching elements for driving active-matrix organic light-emitting diodes (AMOLED) owing to their high mobility and process compatibility. However, oxide semiconductors have inherent defects, causing fast transient charge trapping and device instability. For the next-generation displays such as flexible, wearable, or transparent displays, an active semiconductor layer with ultrahigh mobility and high reliability at low deposition temperature is required. Therefore, we introduced high density plasma microwave-assisted (MWA) sputtering method as a promising deposition tool for the formation of high density and high-performance oxide semiconductor films. In this paper, we present the effect of the MWA sputtering method on the defects and fast charge trapping in In-Sn-Zn-O (ITZO) TFTs using various AC device characterization methodologies including fast I-V, pulsed I-V, transient current, low frequency noise, and discharge current analysis. Using these methods, we were able to analyze the charge trapping mechanism and intrinsic electrical characteristics, and extract the subgap density of the states of oxide TFTs quantitatively. In comparison to conventional sputtered ITZO, high density plasma MWA-sputtered ITZO exhibits outstanding electrical performance, negligible charge trapping characteristics and low subgap density of states. High-density plasma MWA sputtering method has high deposition rate even at low working pressure and control the ion bombardment energy, resulting in forming low defect generation in ITZO and presenting high performance ITZO TFT. We expect the proposed high density plasma sputtering method to be applicable to a wide range of oxide semiconductor device applications.