ABSTRACT
Miniaturized reconstructive spectrometers play a pivotal role in on-chip and portable devices, offering high-resolution spectral measurement through precalibrated spectral responses and AI-driven reconstruction. However, two key challenges persist for practical applications: artificial intervention in algorithm parameters and compatibility with complementary metal-oxide-semiconductor (CMOS) manufacturing. We present a cutting-edge miniaturized reconstructive spectrometer that incorporates a self-adaptive algorithm referenced with Fabry-Perot resonators, delivering precise spectral tests across the visible range. The spectrometers are fabricated with CMOS technology at the wafer scale, achieving a resolution of ~2.5 nm, an average wavelength deviation of ~0.27 nm, and a resolution-to-bandwidth ratio of ~0.46%. Our approach provides a path toward versatile and robust reconstructive miniaturized spectrometers and facilitates their commercialization.
ABSTRACT
Releasing pre-strained two-dimensional nanomembranes to assemble on-chip three-dimensional devices is crucial for upcoming advanced electronic and optoelectronic applications. However, the release process is affected by many unclear factors, hindering the transition from laboratory to industrial applications. Here, we propose a quasistatic multilevel finite element modeling to assemble three-dimensional structures from two-dimensional nanomembranes and offer verification results by various bilayer nanomembranes. Take Si/Cr nanomembrane as an example, we confirm that the three-dimensional structural formation is governed by both the minimum energy state and the geometric constraints imposed by the edges of the sacrificial layer. Large-scale, high-yield fabrication of three-dimensional structures is achieved, and two distinct three-dimensional structures are assembled from the same precursor. Six types of three-dimensional Si/Cr photodetectors are then prepared to resolve the incident angle of light with a deep neural network model, opening up possibilities for the design and manufacturing methods of More-than-Moore-era devices.