Nonvolatile floating-gate memories using Zr and ZrO2 nanodots.

Triple-layer structures of SiO2/Zr nanodots (NDs)/SiO2 for nonvolatile memories have been firstly fabricated at room temperature by using ion beam sputtering deposition (IBSD). High-resolution transmission electron microscopy and X-ray photoelectron spectroscopy demonstrate that Zr NDs self-assembled between the SiO2 layers by IBSD are changed into ZrO2 NDs by annealing. The memory window that is estimated by capacitance-voltage curves increases up to a maximum value of 5.8 V with increasing Zr amount up to 6 monolayers for the annealed samples. The memory window and the charge-loss rate at the programmed state are smaller before annealing, which is explained with reference to double oxide barriers of SiO2 and ZrO2.

Plasmon-enhanced ultraviolet photoluminescence from hybrid structures of graphene/ZnO films.

We report substantially enhanced photoluminescence (PL) from hybrid structures of graphene/ZnO films at a band gap energy of ZnO (∼3.3 eV/376 nm). Despite the well-known constant optical conductivity of graphene in the visible-frequency regime, its abnormally strong absorption in the violet-frequency region has recently been reported. In this Letter, we demonstrate that the resonant excitation of graphene plasmon is responsible for such absorption and eventually contributes to enhanced photoemission from structures of graphene/ZnO films when the corrugation of the ZnO surface modulates photons emitted from ZnO to fulfill the dispersion relation of graphene plasmon. These arguments are strongly supported by PL enhancements depending on the spacer thickness, measurement temperature, and annealing temperature, and the micro-PL mapping images obtained from separate graphene layers on ZnO films.

Ge-nanodot multilayer nonvolatile memories.

1-5 period multilayers of Ge nanodots (NDs) for nonvolatile memories have been self-assembled by ion beam sputtering deposition of an ultra-small amount of Ge between SiO(2) layers at room temperature without post-annealing. High-resolution transmission electron microscopy demonstrates the existence of Ge ND layers well defined with respect to the SiO(2)/Si interface. The memory window that is estimated by capacitance-voltage hysteresis is proportional to the period, and finally reaches a plateau of about 11 V asymptotically over three periods. The program speed is enhanced over the full pulse-time range by increasing bias voltage or period. The charge-loss speed in the programmed state is slower in the samples with larger period. These memory properties are discussed based on possible physical mechanisms.