A Power-Efficient Capacitive Read-Out Circuit With Parasitic-Cancellation for MEMS Cochlea Sensors.

This paper proposes a solution for signal read-out in the MEMS cochlea sensors that have very small sensing capacitance and do not have differential sensing structures. The key challenge in such sensors is the significant signal degradation caused by the parasitic capacitance at the MEMS-CMOS interface. Therefore, a novel capacitive read-out circuit with parasitic-cancellation mechanism is developed; the equivalent input capacitance of the circuit is negative and can be adjusted to cancel the parasitic capacitance. Chip results prove that the use of parasitic-cancellation is able to increase the sensor sensitivity by 35 dB without consuming any extra power. In general, the circuit follows a low-degradation low-amplification approach which is more power-efficient than the traditional high-degradation high-amplification approach; it employs parasitic-cancellation to reduce the signal degradation and therefore a lower gain is required in the amplification stage. Besides, the chopper-stabilization technique is employed to effectively reduce the low-frequency circuit noise and DC offsets. As a result of these design considerations, the prototype chip demonstrates the capability of converting a 7.5 fF capacitance change of a 1-Volt-biased 0.5 pF capacitive sensor pair into a 0.745 V signal-conditioned output at the cost of only 165.2 µW power consumption.

A Bio-Realistic Analog CMOS Cochlea Filter With High Tunability and Ultra-Steep Roll-Off.

This paper presents the design and experimental results of a cochlea filter in analog very large scale integration (VLSI) which highly resembles physiologically measured response of the mammalian cochlea. The filter consists of three specialized sub-filter stages which respectively provide passive response in low frequencies, actively tunable response in mid-band frequencies and ultra-steep roll-off at transition frequencies from pass-band to stop-band. The sub-filters are implemented in balanced ladder topology using floating active inductors. Measured results from the fabricated chip show that wide range of mid-band tuning including gain tuning of over 20 dB, Q factor tuning from 2 to 19 as well as the bio-realistic center frequency shift are achieved by adjusting only one circuit parameter. Besides, the filter has an ultra-steep roll-off reaching over 300 dB/dec. By changing biasing currents, the filter can be configured to operate with center frequencies from 31 Hz to 8 kHz. The filter is 9th order, consumes 59.5 ∼ 90.0 µW power and occupies 0.9 mm2 chip area. A parallel bank of the proposed filter can be used as the front-end in hearing prosthesis devices, speech processors as well as other bio-inspired auditory systems owing to its bio-realistic behavior, low power consumption and small size.