Achieving energy-efficient and high-performance field-effect transistors (FETs) is one of the most important goals for future electronic devices. This paper reports semiconducting single-walled carbon nanotube FETs (s-SWNT-FETs) with an optimized high-krelaxor ferroelectric insulator P(VDF-TrFE-CFE) thickness for low-voltage operation. The s-SWNT-FETs with an optimized thickness (â¼800 nm) of the high-kinsulator exhibited the highest average mobility of 14.4 cm2V-1s-1at the drain voltage (ID) of 1 V, with a high current on/off ratio (Ion/off>105). The optimized device performance resulted from the suppressed gate leakage current (IG) and a sufficiently large capacitance (>50 nF cm-2) of the insulating layer. Despite the extremely high capacitance (>100 nF cm-2) of the insulating layer, an insufficient thickness (<450 nm) induces a highIG, leading to reducedIDand mobility of s-SWNT-FETs. Conversely, an overly thick insulator (>1200 nm) cannot introduce sufficient capacitance, resulting in limited device performance. The large capacitance and sufficient breakdown voltage of the insulating layer with an appropriate thickness significantly improved p-type performance. However, a reduced n-type performance was observed owing to the increased electron trap density caused by fluorine proportional to the insulator thickness. Hence, precise control of the insulator thickness is crucial for achieving low-voltage operation with enhanced s-SWNT-FET performance.
