Over the last few decades, the research on ferroelectric memories has been limited due to their dimensional scalability and incompatibility with complementary metal-oxide-semiconductor (CMOS) technology. The discovery of ferroelectricity in fluorite-structured oxides revived interest in the research on ferroelectric memories, by inducing nanoscale nonvolatility in state-of-the-art gate insulators by minute doping and thermal treatment. The potential of this approach has been demonstrated by the fabrication of sub-30 nm electronic devices. Nonetheless, to realize practical applications, various technical limitations, such as insufficient reliability including endurance, retention, and imprint, as well as large device-to-device-variation, require urgent solutions. Furthermore, such limitations should be considered based on targeting devices as well as applications. Various types of ferroelectric memories including ferroelectric random-access-memory, ferroelectric field-effect-transistor, and ferroelectric tunnel junction should be considered for classical nonvolatile memories as well as emerging neuromorphic computing and processing-in-memory. Therefore, from the viewpoint of materials science, this review covers the recent research focusing on ferroelectric memories from the history of conventional approaches to future prospects.
Continuous advancement in nonvolatile and morphotropic beyond-Moore electronic devices requires integration of ferroelectric and semiconductor materials. The emergence of hafnium oxide (HfO2)-based ferroelectrics that are compatible with atomic-layer deposition has opened interesting and promising avenues of research. However, the origins of ferroelectricity and pathways to controlling it in HfO2 are still mysterious. We demonstrate that local helium (He) implantation can activate ferroelectricity in these materials. The possible competing mechanisms, including He ion-induced molar volume changes, vacancy redistribution, vacancy generation, and activation of vacancy mobility, are analyzed. These findings both reveal the origins of ferroelectricity in this system and open pathways for nanoengineered binary ferroelectrics.
By controlling the configuration of polymorphic phases in high-k Hf0.5 Zr0.5 O2 thin films, new functionalities such as persistent ferroelectricity at an extremely small scale can be exploited. To bolster the technological progress and fundamental understanding of phase stabilization (or transition) and switching behavior in the research area, efficient and reliable mapping of the crystal symmetry encompassing the whole scale of thin films is an urgent requisite. Atomic-scale observation with electron microscopy can provide decisive information for discriminating structures with similar symmetries. However, it often demands multiple/multiscale analysis for cross-validation with other techniques, such as X-ray diffraction, due to the limited range of observation. Herein, an efficient and automated methodology for large-scale mapping of the crystal symmetries in polycrystalline Hf0.5 Zr0.5 O2 thin films is developed using scanning probe-based diffraction and a hybrid deep convolutional neural network at a 2 nm2 resolution. The results for the doped hafnia films are fully proven to be compatible with atomic structures revealed by microscopy imaging, not requiring intensive human input for interpretation.
Deep Learning , Humans , X-Ray Diffraction
With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage1. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO2 (ref. 2), which remains the material of choice to date. Here we report HfO2-ZrO2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric-antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal-oxide-semiconductor capacitors is equivalent to an effective SiO2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO2-based high-dielectric-constant gate stacks without scavenging the interfacial SiO2, which has adverse effects on the electron transport and gate leakage current3. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO2-ZrO2 multilayers, stabilized with competing ferroelectric-antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO2-based high-dielectric-constant materials.
Owing to their switchable spontaneous polarization, ferroelectric materials have been applied in various fields, such as information technologies, actuators, and sensors. In the last decade, as the characteristic sizes of both devices and materials have decreased significantly below the nanoscale, the development of appropriate characterization tools became essential. Recently, a technique based on conductive atomic force microscopy (AFM), called AFM-positive-up-negative-down (PUND), is employed for the direct measurement of ferroelectric polarization under the AFM tip. However, the main limitation of AFM-PUND is the low frequency (i.e., on the order of a few hertz) that is used to initiate ferroelectric hysteresis. A significantly higher frequency is required to increase the signal-to-noise ratio and the measurement efficiency. In this study, a novel method based on high-frequency AFM-PUND using continuous waveform and simultaneous signal acquisition of the switching current is presented, in which polarization-voltage hysteresis loops are obtained on a high-polarization BiFeO3 nanocapacitor at frequencies up to 100 kHz. The proposed method is comprehensively evaluated by measuring nanoscale polarization values of the emerging ferroelectric Hf0.5 Zr0.5 O2 under the AFM tip.
HfO2-based ferroelectrics are highly expected to lead the new paradigm of nanoelectronic devices owing to their unexpected ability to enhance ferroelectricity in the ultimate thickness scaling limit (≤2 nm). However, an understanding of its physical origin remains uncertain because its direct microstructural and chemical characterization in such a thickness regime is extremely challenging. Herein, we solve the mystery for the continuous retention of high ferroelectricity in an ultrathin hafnium zirconium oxide (HZO) film (â¼2 nm) by unveiling the evolution of microstructures and crystallographic orientations using a combination of state-of-the-art structural analysis techniques beyond analytical limits and theoretical approaches. We demonstrate that the enhancement of ferroelectricity in ultrathin HZO films originates from textured grains with a preferred orientation along an unusual out-of-plane direction of (112). In principle, (112)-oriented grains can exhibit 62% greater net polarization than the randomly oriented grains observed in thicker samples (>4 nm). Our first-principles calculations prove that the hydroxyl adsorption during the deposition process can significantly reduce the surface energy of (112)-oriented films, thereby stabilizing the high-index facet of (112). This work provides new insights into the ultimate scaling of HfO2-based ferroelectrics, which may facilitate the design of future extremely small-scale logic and memory devices.
Piezoelectricity of transition metal dichalcogenides (TMDs) under mechanical strain has been theoretically and experimentally studied. Powerful strain sensors using Schottky barrier variation in TMD/metal junctions as a result of the strain-induced lattice distortion and associated ion-charge polarization were demonstrated. However, the nearly fixed work function of metal electrodes limits the variation range of a Schottky barrier. We demonstrate a highly sensitive strain sensor using a variable Schottky barrier in a MoS2/graphene heterostructure field effect transistor (FET). The low density of states near the Dirac point in graphene allows large modulation of the graphene Fermi level and corresponding Schottky barrier in a MoS2/graphene junction by strain-induced polarized charges of MoS2. Our theoretical simulations and temperature-dependent electrical measurements show that the Schottky barrier change is maximized by placing the Fermi level of the graphene at the charge neutral (Dirac) point by applying gate voltage. As a result, the maximum Schottky barrier change (ΔΦSB) and corresponding current change ratio under 0.17% strain reach 118 meV and 978, respectively, resulting in an ultrahigh gauge factor of 575â¯294, which is approximately 500 times higher than that of metal/TMD junction strain sensors (1160) and 140 times higher than the conventional strain sensors (4036). The ultrahigh sensitivity of graphene/MoS2 heterostructure FETs can be developed for next-generation electronic and mechanical-electronic devices.
Although many studies have been carried out on the doping of transition metal dichalcogenides (TMDCs), introducing controllable amounts of dopants into a TMD lattice is still insufficient. Here we demonstrate doping controlled TMDC growth by the replacement of selenium with phosphorus during the synthesis of the monolayer WSe2. The phosphorus doping density was precisely controlled by fine adjustment of the amount of P2O5 dopant powder along the pre-annealing time. Raman spectroscopy, photoluminescence (PL), X-ray photoelectron spectroscopy (XPS), and high-angle annular bright field scanning tunneling electron microscopy (HAADF STEM) provide evidence that P doping occurs within the WSe2 crystal with P occupying the substitutional Se sites. With regard to its electrical characteristics, the hole majority current of P-doped WSe2 is 100-times higher than that of the intrinsic WSe2. The measured doping concentration ranged from â¼8.16 × 1010 to â¼1.20 × 1012 depending on the amount of P2O5 dopant powder by pre-annealing.
Vertical integration of 2D layered materials to form van der Waals heterostructures (vdWHs) offers new functional electronic and optoelectronic devices. However, the mobility in vertical carrier transport in vdWHs of vertical field-effect transistor (VFET) is not yet investigated in spite of the importance of mobility for the successful application of VFETs in integrated circuits. Here, the mobility in VFET of vdWHs under different drain biases, gate biases, and metal work functions is first investigated and engineered. The traps in WSe2 are the main source of scattering, which influences the vertical mobility and three distinct transport mechanisms: Ohmic transport, trap-limited transport, and space-charge-limited transport. The vertical mobility in VFET can be improved by suppressing the trap states by raising the Fermi level of WSe2 . This is achieved by increasing the injected carrier density by applying a high drain voltage, or decreasing the Schottky barrier at the graphene/WSe2 and metal/WSe2 junctions by applying a gate bias and reducing the metal work function, respectively. Consequently, the mobility in Mn vdWH at +50 V gate voltage is about 76 times higher than the initial mobility of Au vdWH. This work enables further improvements in the VFET for successful application in integrated circuits.
Despite recent efforts for the development of transition-metal-dichalcogenide-based high-performance thin-film transistors, device performance has not improved much, mainly because of the high contact resistance at the interface between the 2D semiconductor and the metal electrode. Edge contact has been proposed for the fabrication of a high-quality electrical contact; however, the complete electronic properties for the contact resistance have not been elucidated in detail. Using the scanning tunneling microscopy/spectroscopy and scanning transmission electron microscopy techniques, the edge contact, as well as the lateral boundary between the 2D semiconducting layer and the metalized interfacial layer, are investigated, and their electronic properties and the energy band profile across the boundary are shown. The results demonstrate a possible mechanism for the formation of an ohmic contact in homojunctions of the transition-metal dichalcogenides semiconductor-metal layers and suggest a new device scheme utilizing the low-resistance edge contact.
Semiconducting transition metal dichalcogenides (TMDs) are promising materials for photodetection over a wide range of visible wavelengths. Photodetection is generally realized via a phototransistor, photoconductor, p-n junction photovoltaic device, and thermoelectric device. The photodetectivity, which is a primary parameter in photodetector design, is often limited by either low photoresponsivity or a high dark current in TMDs materials. Here, we demonstrated a highly sensitive photodetector with a MoS2/h-BN/graphene heterostructure, by inserting a h-BN insulating layer between graphene electrode and MoS2 photoabsorber, the dark-carriers were highly suppressed by the large electron barrier (2.7 eV) at the graphene/h-BN junction while the photocarriers were effectively tunneled through small hole barrier (1.2 eV) at the MoS2/h-BN junction. With both high photocurrent/dark current ratio (>105) and high photoresponsivity (180 AW-1), ultrahigh photodetectivity of 2.6 × 1013 Jones was obtained at 7 nm thick h-BN, about 100-1000 times higher than that of previously reported MoS2-based devices.
Atomically thin two-dimensional (2D) materials range from semimetallic graphene to insulating hexagonal boron nitride to semiconducting transition-metal dichalcogenides. Recently, metal-insulator-semiconductor field effect transistors built from these 2D elements were studied for flexible and transparent electronics. However, to induce ambipolar characteristics for alternative power-efficient circuitry, ion-gel gating is often employed for high capacitive coupling, limiting stable operation at ambient conditions. Here, we report reconfigurable MoTe2 optoelectronic transistors with all 2D components, where the device can be reconfigured by both drain and gate voltages. Eight different configurations for each fixed voltage are spatially resolved by scanning photocurrent microscopy. In addition, metal-insulator transitions are observed in both electron and hole carriers under 2 V due to strong Coulomb interaction in the system. Furthermore, the vertical tunneling photocurrent through multiple van der Waals layers between the gate and source contacts is measured. Our reconfigurable devices offer potential building blocks for system-on-a-chip optoelectronics.
Concepts of non-volatile memory to replace conventional flash memory have suffered from low material reliability and high off-state current, and the use of a thick, rigid blocking oxide layer in flash memory further restricts vertical scale-up. Here, we report a two-terminal floating gate memory, tunnelling random access memory fabricated by a monolayer MoS2/h-BN/monolayer graphene vertical stack. Our device uses a two-terminal electrode for current flow in the MoS2 channel and simultaneously for charging and discharging the graphene floating gate through the h-BN tunnelling barrier. By effective charge tunnelling through crystalline h-BN layer and storing charges in graphene layer, our memory device demonstrates an ultimately low off-state current of 10(-14) A, leading to ultrahigh on/off ratio over 10(9), about â¼10(3) times higher than other two-terminal memories. Furthermore, the absence of thick, rigid blocking oxides enables high stretchability (>19%) which is useful for soft electronics.
The downscaling of the capacitance equivalent oxide thickness (CET) of a gate dielectric film with a high dielectric constant, such as atomic layer deposited (ALD) HfO2, is a fundamental challenge in achieving high-performance graphene-based transistors with a low gate leakage current. Here, we assess the application of various surface modification methods on monolayer graphene sheets grown by chemical vapour deposition to obtain a uniform and pinhole-free ALD HfO2 film with a substantially small CET at a wafer scale. The effects of various surface modifications, such as N-methyl-2-pyrrolidone treatment and introduction of sputtered ZnO and e-beam-evaporated Hf seed layers on monolayer graphene, and the subsequent HfO2 film formation under identical ALD process parameters were systematically evaluated. The nucleation layer provided by the Hf seed layer (which transforms to the HfO2 layer during ALD) resulted in the uniform and conformal deposition of the HfO2 film without damaging the graphene, which is suitable for downscaling the CET. After verifying the feasibility of scaling down the HfO2 thickness to achieve a CET of ~1.5 nm from an array of top-gated metal-oxide-graphene field-effect transistors, we fabricated graphene heterojunction tunnelling transistors with a record-low subthreshold swing value of <60 mV/dec on an 8" glass wafer.
We developed an effective graphene transfer method for graphene/silicon Schottky diodes on a wafer as large as 6 inches. Graphene grown on a large scale substrate was passivated and sealed with a gold layer, protecting graphene from any possible contaminant and keeping good electrical contact. The Au/graphene was transferred by the tension-assisted transfer process without polymer residues. The gold film itself was used directly as the electrodes of a Schottky diode. We demonstrated wafer-scale integration of graphene/silicon Schottky diode using the proposed transfer process. The transmission electron microscopy analysis and relatively low ideality factor of the diodes indicated fewer defects on the interface than those obtained using the conventional poly(methyl methacrylate)-assisted transfer method. We further demonstrated gas sensors as an application of graphene Schottky diodes.
Graphene heterostructures in which graphene is combined with semiconductors or other layered 2D materials are of considerable interest, as a new class of electronic devices has been realized. Here we propose a technology platform based on graphene-thin-film-semiconductor-metal (GSM) junctions, which can be applied to large-scale and power-efficient electronics compatible with a variety of substrates. We demonstrate wafer-scale integration of vertical field-effect transistors (VFETs) based on graphene-In-Ga-Zn-O (IGZO)-metal asymmetric junctions on a transparent 150 × 150 mm(2) glass. In this system, a triangular energy barrier between the graphene and metal is designed by selecting a metal with a proper work function. We obtain a maximum current on/off ratio (Ion/Ioff) up to 10(6) with an average of 3010 over 2000 devices under ambient conditions. For low-power logic applications, an inverter that combines complementary n-type (IGZO) and p-type (Ge) devices is demonstrated to operate at a bias of only 0.5 V.
Graphite/chemistry , Semiconductors , Transistors, Electronic , Electronics
The rectifying Schottky characteristics of the metal-semiconductor junction with high contact resistance have been a serious issue in modern electronic devices. Herein, we demonstrated the conversion of the Schottky nature of the Ni-Si junction, one of the most commonly used metal-semiconductor junctions, into an Ohmic contact with low contact resistance by inserting a single layer of graphene. The contact resistance achieved from the junction incorporating graphene was about 10(-8) ~ 10(-9) Ω cm(2) at a Si doping concentration of 10(17) cm(-3).
We report a new strategy to selectively localize and control microtubule translocation via electrical control of microtubules using a microfabricated channel on a functionalized-graphene electrode with high transparency and conductivity. A patterned SU-8 film acts as an insulation layer which shields the electrical field generated by the graphene underneath while the localized electric field on the exposed graphene surface guides the negatively charged microtubules. This is the first report showing that functionalized graphene can support and control microtubule motility.
Fungal Proteins/metabolism , Graphite/metabolism , Kinesins/metabolism , Micro-Electrical-Mechanical Systems/instrumentation , Microtubules/metabolism , Neurospora crassa/metabolism , Electric Conductivity , Electrodes , Equipment Design , Graphite/chemistry , Humans
Despite several years of research into graphene electronics, sufficient on/off current ratio I(on)/I(off) in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier "barristor" (GB), in which the key is an atomically sharp interface between graphene and hydrogenated silicon. Large modulation on the device current (on/off ratio of 10(5)) is achieved by adjusting the gate voltage to control the graphene-silicon Schottky barrier. The absence of Fermi-level pinning at the interface allows the barrier's height to be tuned to 0.2 electron volt by adjusting graphene's work function, which results in large shifts of diode threshold voltages. Fabricating GBs on respective 150-mm wafers and combining complementary p- and n-type GBs, we demonstrate inverter and half-adder logic circuits.
A graphene nanoribbon (GNR) is an important basic structure to open a bandgap in graphene. The GNR processes reported in the literature are complex, time-consuming, and expensive; moreover, the device yield is relatively low. In this paper, a simple new process to fabricate a long and straight graphene nanoribbon with a high yield has been proposed. This process utilizes CVD graphene substrate and a ZnO nanowire as the hardmask for patterning. 8 µm long and 50-100 nm wide GNRs were successfully demonstrated in high density without any trimming, and â¼ 10% device yield was realized with a top-down patterning process. After passivating the surfaces of the GNRs using a low temperature atomic layer deposition (ALD) of Al(2)O(3), high performance GNR MOSFETs with symmetric drain-current-gate-voltage (I(d)-V(g)) curves were demonstrated and a field effect mobility up to â¼ 1200 cm(2) V(-1) s(-1) was achieved at V(d) = 10 mV.
