Nonradiative Energy Transfer Enables a hv < Eg Response of Perovskite Quantum Dots in Si-Based Inorganic-Organic Hybrid Solar Cells.

High performance is a crucial factor in seeking a more competitive levelized cost of electricity for the extensive popularization of c-Si solar cells. Here, CsPbBr3 quantum dots (QDs) have been first applied as the light-converting layer to enhance the full-spectrum light response, resulting in an ∼71% enhancement of power conversion efficiency within silicon-based solar cells. Remarkably, even if the photon energy is smaller than the bandgap of CsPbBr3 QDs, the long-wavelength external quantum efficiency shows a significant increase. Such surprising results can be attributed to the nonradiative energy transfer (NRET) mechanism of CsPbBr3 QDs, which can transfer long-wavelength-generated dipoles into the Si base with the assistance of a Coulomb force. Furthermore, a dipole-transferring model, which considers that the Al2O3 passivation layer would play a negative role in the NRET process, is creatively but supportively proposed. These results highlight a simple, low-cost but promising strategy to improve the performance of c-Si solar cells.

Ultra-Confined Catalytic Growth Integration of Sub-10 nm 3D Stacked Silicon Nanowires Via a Self-Delimited Droplet Formation Strategy.

Fabricating ultrathin silicon (Si) channels down to critical dimension (CD) <10 nm, a key capability to implementing cutting-edge microelectronics and quantum charge-qubits, has never been accomplished via an extremely low-cost catalytic growth. In this work, 3D stacked ultrathin Si nanowires (SiNWs) are demonstrated, with width and height of Wnw  = 9.9 ± 1.2 nm (down to 8 nm) and Hnw  = 18.8 ± 1.8 nm, that can be reliably grown into the ultrafine sidewall grooves, approaching to the CD of 10 nm technology node, thanks to a new self-delimited droplet control strategy. Interestingly, the cross-sections of the as-grown SiNW channels can also be easily tailored from fin-like to sheet-like geometries by tuning the groove profile, while a sharply folding guided growth indicates a unique capability to produce closely-packed multiple rows of stacked SiNWs, out of a single run growth, with the minimal use of catalyst metal. Prototype field effect transistors are also successfully fabricated, achieving Ion/off ratio and sub-threshold swing of >106 and 125 mV dec-1 , respectively. These results highlight the unexplored potential of versatile catalytic growth to compete with, or complement, the advanced top-down etching technology in the exploitation of monolithic 3D integration of logic-in-memory, neuromorphic and charge-qubit applications.

Review on 3D growth engineering and integration of nanowires for advanced nanoelectronics and sensor applications.

Recent years have witnessed increasing efforts devoted to the growth, assembly and integration of quasi-one dimensional (1D) nanowires (NWs), as fundamental building blocks in advanced three-dimensional (3D) architecture, to explore a series of novel nanoelectronic and sensor applications. An important motivation behind is to boost the integration density of the electronic devices by stacking more functional units in theout-of-plane z-direction, where the NWs are supposed to be patterned or grown as vertically standing or laterally stacked channels to minimize their footprint area. The other driving force is derived from the unique possibility of engineering the 1D NWs into more complex, as well as more functional, 3D nanostructures, such as helical springs and kinked probes, which are ideal nanostructures for developping advanced nanoelectromechanical system (NEMS), bio-sensing and manipulation applications. This Review will first examine the recent progresses made in the construction of 3D nano electronic devices, as well as the new fabrication and growth technologies established to enable an efficient 3D integration of the vertically standing or laterally stacked NW channels. Then, the different approaches to produce and tailor more sophisticated 3D helical springs or purposely-designed nanoprobes will be revisited, together with their applications in NEMS resonators, bio sensors and stimulators in neural system.

Highly Stretchable High-Performance Silicon Nanowire Field Effect Transistors Integrated on Elastomer Substrates.

Quasi-1D silicon nanowires (SiNWs) field effect transistors (FETs) integrated upon large-area elastomers are advantageous candidates for developing various high-performance stretchable electronics and displays. In this work, it is demonstrated that an orderly array of slim SiNW channels, with a diameter of <80 nm, can be precisely grown into desired locations via an in-plane solid-liquid-solid (IPSLS) mechanism, and reliably batch-transferred onto large area polydimethylsiloxane (PDMS) elastomers. Within an optimized discrete FETs-on-islands architecture, the SiNW-FETs can sustain large stretching strains up to 50% and repetitive testing for more than 1000 cycles (under 20% strain), while achieving a high hole carrier mobility, Ion /Ioff current ratio and subthreshold swing (SS) of ≈70 cm2 V-1 s-1 , >105  and 134 - 277 mV decade-1 , respectively, working stably in an ambient environment over 270 days without any passivation protection. These results indicate a promising new routine to batch-manufacture and integrate high-performance, scalable and stretchable SiNW-FET electronics that can work stably in harsh and large-strain environments, which is a key capability for future practical flexible display and wearable electronic applications.

Terrace-confined guided growth of high-density ultrathin silicon nanowire array for large area electronics.

Ultrathin silicon nanowires (SiNWs) are ideal 1D channels to construct high performance nanoelectronics and sensors. We here report on a high-density catalytic growth of orderly ultrathin SiNWs, with diameter down toDnw=27±2nmand narrow NW-to-NW spacing of onlySnw âˆ¼80 nm, without the use of high-resolution lithography. This has been accomplished via a terrace-confined strategy, where tiny indium (In) droplets move on sidewall terraces to absorb precoated amorphous Si layer as precursor and produce self-aligned SiNW array. It is found that, under proper parameter control, a tighter terrace-step confinement can help to scale the dimensions of the SiNW array down to the extremes that have not been reported before, while maintaining still a stable guiding growth over complex contours. Prototype SiNW field effect transistors demonstrate a highIon/Ioffcurrent ratio ∼107, low leakage current of ∼0.3 pA and steep subthreshold swing of 220 mV dec-1. These results highlight the unexplored potential of catalytic growth in advanced nanostructure fabrication that is highly relevant for scalable SiNW logic and sensor applications.

Highly Sensitive Ammonia Gas Detection at Room Temperature by Integratable Silicon Nanowire Field-Effect Sensors.

Toxic gas monitoring at room temperature (RT) is of great concern to public health and safety, where ultrathin silicon nanowires (SiNWs), with diameter <80 nm, are ideal one-dimensional candidates to achieve high-performance field-effect sensing. However, a precise integration of the tiny SiNWs as active gas sensor channels has not been possible except for the use of expensive and inefficient electron beam lithography and etching. In this work, we demonstrate an integratable fabrication of field-effect sensors based on orderly SiNW arrays, produced via step-guided in-plane solid-liquid-solid growth. The back-gated SiNW sensors can be tuned into suitable subthreshold detection regime to achieve an outstanding field-effect sensitivity (75.8% @ 100 ppm NH3), low detection limit (100 ppb), and excellent selectivity to NH3 gas at RT, with fast response/recovery time scales (Tres/Trec) of 20 s (at 100 ppb NH3) and excellent repeatability and high stability over 180 days. These outstanding sensing performances can be attributed to the fast charge transfer between adsorbed NH3 molecules and the exposed SiNW channels, indicating a convenient strategy to fabricate and deploy high-performance gas detectors that are widely needed in the booming marketplace of wearable or portable electronics.

Superfast Growth Dynamics of High-Quality Silicon Nanowires on Polymer Films via Self-Selected Laser-Droplet-Heating.

Growing high quality silicon nanowires (SiNWs) at elevated temperature on cooler polymer films seems to be contradictive but highly desirable for building high performance flexible and wearable electronics. In this work, we demonstrate a superfast (vnw > 3.5 µm·s-1) growth of high quality SiNWs on polymer/glass substrates, powered by self-selected laser at 808 nm heating of indium catalyst droplets that absorb amorphous Si layer to produce SiNWs. Because of the tiny heat capacity of the nanodroplets, the SiNW growth can be quickly heated up and frozen via rapid laser ON/OFF switching, enabling a deterministic diameter modulation in the ultralong SiNWs. Finally, prototype field effect transistors are also fabricated upon the laser-droplet-heating grown SiNWs with a high Ion/Ioff ratio of >104 and reasonable subthreshold swing of 386 mV·dec-1, opening a generic new route to integrate high-quality NW channels directly upon large area and lightweight polymer substrates for developing high-performance flexible electronics.

Unprecedented Uniform 3D Growth Integration of 10-Layer Stacked Si Nanowires on Tightly Confined Sidewall Grooves.

Bottom-up catalytic growth offers a high-yield, versatile, and powerful tool for the construction of versatile 3D nanocomplexes, while the major challenge is to achieve a precise location and uniformity control, as guaranteed by top-down lithography. Here, an unprecedented uniform and reliable growth integration of 10-layer stacked Si nanowires (SiNWs) has been accomplished, for the very first time, via a new groove-confined and tailored catalyst formation and guided growth upon the truncated sidewall of SiO2/SiNx multilayers. The SiNW array accomplishes a narrow diameter of Dnw = 28 ± 2.4 nm, NW-to-NW spacing of tsp = 40 nm, and extremely stable growth over Lnw > 50 µm and bending locations, which can compete with or even outperform the state-of-the-art top-down lithography and etching approaches, in terms of stacking number, channel uniformity at different levels, fabrication cost, and efficiency. These results provide a solid basis to establish a new 3D integration approach to batch-manufacture various advanced electronic and sensor applications.

Facile 3D integration of Si nanowires on Bosch-etched sidewalls for stacked channel transistors.

Three-dimensional (3D) integration is a promising strategy to integrate more functions into a given footprint. In this work, we report on a convenient new strategy to grow and integrate high density Si nanowire (SiNW) arrays on the parallel sidewall grooves formed by Bosch etching, via a low temperature (<350 °C) in-plane solid-liquid-solid (IPSLS) mechanism. It is observed that both the pitch and the depth of the grooves can be reliably controlled, by tuning the Bosch etching parameters, to adjust the density of SiNWs, and the sidewall growth of SiNWs is rather stable even along the turnings. This approach has demonstrated a facile batch-manufacturing of stacked SiNWs, where the SiNWs exhibit a mean diameter of 40 nm and a spacing of 100 nm, without the use of any high resolution lithography. Prototype stacked channel transistors are also fabricated, with an impressive on/off current of >107 and a hole mobility of 57 cm2 V-1 s-1, in a unique vertical side-gate configuration. These results highlight the unique potential and benefit of combining conventional Bosch processing with high precision 3D guided growth of SiNWs for constructing more complex and functional stacked channel electronics.