Extreme light absorption by multiple plasmonic layers on upgraded metallurgical grade silicon solar cells.

We fabricate high-efficiency, ultrathin (∼12 µm), flexible, upgraded metallurgical-grade polycrystalline silicon solar cells with multiple plasmonic layers precisely positioned on top of the cell to dramatically increase light absorption. This scalable approach increases the optical absorptivity of our solar cells over a broad range of wavelengths, and they achieve efficiencies η ≈ 11%. Detailed studies on the electrical and optical properties of the developed solar cells elucidate the light absorption contribution of each individual plasmonic layer. Finite-difference time-domain simulations were also performed to yield further insights into the obtained results. We anticipate that the findings from this work will provide useful design considerations for fabricating a range of different solar cell systems.

High efficiency thin upgraded metallurgical-grade silicon solar cells on flexible substrates.

We present a thin film (<20 µm) solar cell based on upgraded metallurgical-grade polycrystalline Si that utilizes silver nanoparticles atop silicon nanopillars created by block copolymer nanolithography to enhance light absorption and increase cell efficiency η > 8%. In addition, the solar cells are flexible and semitransparent so as to reduce balance of systems costs and open new applications for conformable solar cell arrays on a variety of surfaces. Detailed studies on the optical and electrical properties of the resulting solar cells suggest that both antireflective and light-trapping mechanisms are key to the enhanced efficiency.

Oligo- and polythiophene/ZnO hybrid nanowire solar cells.

We demonstrate the basic operation of an organic/inorganic hybrid single nanowire solar cell. End-functionalized oligo- and polythiophenes were grafted onto ZnO nanowires to produce p-n heterojunction nanowires. The hybrid nanostructures were characterized via absorption and electron microscopy to determine the optoelectronic properties and to probe the morphology at the organic/inorganic interface. Individual nanowire solar cell devices exhibited well-resolved characteristics with efficiencies as high as 0.036%, J(sc) = 0.32 mA/cm(2), V(oc) = 0.4 V, and a FF = 0.28 under AM 1.5 illumination with 100 mW/cm(2) light intensity. These individual test structures will enable detailed analysis to be carried out in areas that have been difficult to study in bulk heterojunction devices.

High density n-Si/n-TiO2 core/shell nanowire arrays with enhanced photoactivity.

There are currently great needs to develop low-cost inorganic materials that can efficiently perform solar water splitting as photoelectrolysis of water into hydrogen and oxygen has significant potential to provide clean energy. We investigate the Si/TiO(2) nanowire heterostructures to determine their potential for the photooxidation of water. We observed that highly dense Si/TiO(2) core/shell nanowire arrays enhanced the photocurrent by 2.5 times compared to planar Si/TiO(2) structure due to their low reflectance and high surface area. We also showed that n-Si/n-TiO(2) nanowire arrays exhibited a larger photocurrent and open circuit voltage than p-Si/n-TiO(2) nanowires due to a barrier at the heterojunction.

Silicon nanowires as efficient thermoelectric materials.

Thermoelectric materials interconvert thermal gradients and electric fields for power generation or for refrigeration. Thermoelectrics currently find only niche applications because of their limited efficiency, which is measured by the dimensionless parameter ZT-a function of the Seebeck coefficient or thermoelectric power, and of the electrical and thermal conductivities. Maximizing ZT is challenging because optimizing one physical parameter often adversely affects another. Several groups have achieved significant improvements in ZT through multi-component nanostructured thermoelectrics, such as Bi(2)Te(3)/Sb(2)Te(3) thin-film superlattices, or embedded PbSeTe quantum dot superlattices. Here we report efficient thermoelectric performance from the single-component system of silicon nanowires for cross-sectional areas of 10 nm x 20 nm and 20 nm x 20 nm. By varying the nanowire size and impurity doping levels, ZT values representing an approximately 100-fold improvement over bulk Si are achieved over a broad temperature range, including ZT approximately 1 at 200 K. Independent measurements of the Seebeck coefficient, the electrical conductivity and the thermal conductivity, combined with theory, indicate that the improved efficiency originates from phonon effects. These results are expected to apply to other classes of semiconductor nanomaterials.

A 160-kilobit molecular electronic memory patterned at 10(11) bits per square centimetre.

The primary metric for gauging progress in the various semiconductor integrated circuit technologies is the spacing, or pitch, between the most closely spaced wires within a dynamic random access memory (DRAM) circuit. Modern DRAM circuits have 140 nm pitch wires and a memory cell size of 0.0408 mum(2). Improving integrated circuit technology will require that these dimensions decrease over time. However, at present a large fraction of the patterning and materials requirements that we expect to need for the construction of new integrated circuit technologies in 2013 have 'no known solution'. Promising ingredients for advances in integrated circuit technology are nanowires, molecular electronics and defect-tolerant architectures, as demonstrated by reports of single devices and small circuits. Methods of extending these approaches to large-scale, high-density circuitry are largely undeveloped. Here we describe a 160,000-bit molecular electronic memory circuit, fabricated at a density of 10(11) bits cm(-2) (pitch 33 nm; memory cell size 0.0011 microm2), that is, roughly analogous to the dimensions of a DRAM circuit projected to be available by 2020. A monolayer of bistable, [2]rotaxane molecules served as the data storage elements. Although the circuit has large numbers of defects, those defects could be readily identified through electronic testing and isolated using software coding. The working bits were then configured to form a fully functional random access memory circuit for storing and retrieving information.

Circuit fabrication at 17 nm half-pitch by nanoimprint lithography.

High density metal cross bars at 17 nm half-pitch were fabricated by nanoimprint lithography. Utilizing the superlattice nanowire pattern transfer technique, a 300-layer GaAs/AlGaAs superlattice was employed to produce an array of 150 Si nanowires (15 nm wide at 34 nm pitch) as an imprinting mold. A successful reproduction of the Si nanowire pattern was demonstrated. Furthermore, a cross-bar platinum nanowire array with a cell density of approximately 100 Gbit/cm(2) was fabricated by two consecutive imprinting processes.

Spiers Memorial Lecture. Molecular mechanics and molecular electronics.

We describe our research into building integrated molecular electronics circuitry for a diverse set of functions, and with a focus on the fundamental scientific issues that surround this project. In particular, we discuss experiments aimed at understanding the function of bistable rotaxane molecular electronic switches by correlating the switching kinetics and ground state thermodynamic properties of those switches in various environments, ranging from the solution phase to a Langmuir monolayer of the switching molecules sandwiched between two electrodes. We discuss various devices, low bit-density memory circuits, and ultra-high density memory circuits that utilize the electrochemical switching characteristics of these molecules in conjunction with novel patterning methods. We also discuss interconnect schemes that are capable of bridging the micrometre to submicrometre length scales of conventional patterning approaches to the near-molecular length scales of the ultra-dense memory circuits. Finally, we discuss some of the challenges associated with fabricated ultra-dense molecular electronic integrated circuits.

Ultrahigh-density nanowire lattices and circuits.

We describe a general method for producing ultrahigh-density arrays of aligned metal and semiconductor nanowires and nanowire circuits. The technique is based on translating thin film growth thickness control into planar wire arrays. Nanowires were fabricated with diameters and pitches (center-to-center distances) as small as 8 nanometers and 16 nanometers, respectively. The nanowires have high aspect ratios (up to 10(6)), and the process can be carried out multiple times to produce simple circuits of crossed nanowires with a nanowire junction density in excess of 10(11) per square centimeter. The nanowires can also be used in nanomechanical devices; a high-frequency nanomechanical resonator is demonstrated.