ABSTRACT
In this work, we present a novel, to the best of our knowledge, lateral avalanche photodiode (APD) with low breakdown voltage and high bandwidth which has the potential to serve as a core device in future large-scale advanced optoelectronic hybrid chips. By taking advantage of a silicon-on-insulator (SOI) substrate combined with a separation absorption multiplier (SAM) structure, the demonstrated APDs exhibit a high gain of 148. Furthermore, the minimum breakdown voltage of the measured device is 6.1â V, which represents the lowest breakdown voltage for Si-APD, making it compatible with the existing CMOS technology for low voltage operation. Benefiting from an ultra-thin top silicon and lateral SAM structure, the problem of edge breakdown has been completely solved. Additionally, a set of device arrays with absorption and avalanche regions of different sizes is also manufactured and compared. Our findings indicate that the proposed APD has fascinating application prospects in the CMOS process-based LIDAR chips.
ABSTRACT
Functionally diverse devices with artificial neuron and synapse properties are critical for neuromorphic systems. We present a two-terminal artificial leaky-integrate-fire (LIF) neuron based on 6 nm Hf0.1Zr0.9O2 (HZO) antiferroelectric (AFE) thin films and develop a synaptic device through work function (WF) engineering. LIF neuron characteristics, including integration, firing, and leakage, are achieved in W/HZO/W devices due to the accumulated polarization and spontaneous depolarization of AFE HZO films. By engineering the top electrode with asymmetric WFs, we found that Au/Ti/HZO/W devices exhibit synaptic weight plasticity, such as paired-pulse facilitation and long-term potentiation/depression, achieving >90% accuracy in digit recognition within constructed artificial neural network systems. These findings suggest that AFE HZO capacitor-based neurons and WF-engineered artificial synapses hold promise for constructing efficient spiking neuron networks and artificial neural networks, thereby advancing neuromorphic computing applications based on emerging AFE HZO devices.
ABSTRACT
A novel high-speed and process-compatible carrier-stored trench-gate bipolar transistor (CSTBT) combined with split-gate technology is proposed in this paper. The device features a split polysilicon electrode in the trench, where the left portion is equipotential with the cathode. This design mitigates the impact of the anode on the trench gate, resulting in a reduction in the gate-collector capacitance (CGC) to improve the dynamic characteristics. On the left side of the device cell, the P-layer, the carrier-stored (CS) layer and the P-body are formed from the bottom up by ion implantation and annealing. The P-layer beneath the trench bottom can decrease the electric field at the bottom of the trench, thereby improving breakdown voltage (BV) performance. Simultaneously, the highly doped CS layer strengthens the hole-accumulation effect at the cathode. Moreover, the PNP doping layers on the left form a self-biased pMOS. In a short-circuit state, the self-biased pMOS turns on at a certain collector voltage, causing the potential of the CS-layer to be clamped by the hole channel. Consequently, the short-circuit current no longer increases with the collector voltage. The simulation results reveal significant improvements in comparison with the conventional CSTBT under the same on-state voltage (1.48 V for 100 A/cm2). Specifically, the turn-off time (toff) and turn-off loss (Eoff) are reduced by 38.4% and 41.8%, respectively. The short-circuit current is decreased by 50%, while the short-circuit time of the device is increased by 2.46 times.
ABSTRACT
In this paper, we demonstrate a comprehensive study of NF3-based selective etching processes for inner spacer formation and for channel release, enabling stacked horizontal gate-all-around Si nanosheet transistor architectures. A cyclic etching process consisting of an oxidation treatment step and an etching step is proposed and used for SiGe selective etching. The cyclic etching process exhibits a slower etching rate and higher etching selectivity compared to the direct etching process. The cycle etching process consisting of Recipe 1, which has a SiGe etching rate of 0.98 nm/cycle, is used for the cavity etch. The process achieved good interlayer uniformity of cavity depth (cavity depth ≤ 5 ± 0.3 nm), while also obtaining a near-ideal rectangular SiGe etch front shape (inner spacer shape = 0.84) and little Si loss (0.44 nm@ each side). The cycle etching process consisting of Recipe 4 with extremely high etching selectivity is used for channel release. The process realizes the channel release of nanosheets with a multi-width from 30 nm to 80 nm with little Si loss. In addition, a selective isotropic etching process using NF3/O2/Ar gas mixture is used to etch back the SiN film. The impact of the O2/NF3 ratio on the etching selectivity of SiN to Si and the surface roughness of SiN after etching is investigated. With the introduction of O2 into NF3/Ar discharge, the selectivity increases sharply, but when the ratio of O2/NF3 is up to 1.0, the selectivity tends to a constant value and the surface roughness of SiN increases rapidly. The optimal parameter is O2/NF3 = 0.5, resulting in a selectivity of 5.4 and a roughness of 0.19 nm.
ABSTRACT
The gallium-doped hafnium oxide (Ga-HfO2) films with different Ga doping concentrations were prepared by adjusting the HfO2/Ga2O3 atomic layer deposition cycle ratio for high-speed and low-voltage operation in HfO2-based ferroelectric memory. The Ga-HfO2 ferroelectric films reveal a finely modulated coercive field (Ec) from 1.1 (HfO2/Ga2O3 = 32:1) to an exceptionally low 0.6 MV/cm (HfO2/Ga2O3 = 11:1). This modulation arises from the competition between domain nucleation and propagation speed during polarization switching, influenced by the intrinsic domain density and phase dispersion in the film with specific Ga doping concentrations. Higher Ec samples exhibit a nucleation-dominant switching mechanism, while lower Ec samples undergo a transition from a nucleation-dominant to a propagation-dominant reversal mechanism as the electric field increases. This work introduces Ga as a viable dopant for low Ec and offers insights into material design strategies for HfO2-based ferroelectric memory applications.
ABSTRACT
Realization of dendric signal processing in the human brain is of great significance for spatiotemporal neuromorphic engineering. Here, we proposed an ionic dendrite device with multichannel communication, which could realize synaptic behaviors even under an ultralow action potential of 80 mV. The device not only could simulate one-to-one information transfer of axons but also achieve a many-to-one modulation mode of dendrites. By the adjustment of two presynapses, Pavlov's dog conditioning experiment was learned successfully. Furthermore, the device also could emulate the biological synaptic competition and synaptic cooperation phenomenon through the comodulation of three presynapses, which are crucial for artificial neural network (ANN) implementation. Finally, an ANN was further constructed to realize highly efficient and anti-interference recognition of fashion patterns. By introducing the cooperative device, synaptic weight updates could be improved for higher linearity and larger dynamic regulation range in neuromorphic computing, resulting in higher recognition accuracy and efficiency. Such an artificial dendric device has great application prospects in the processing of more complex information and the construction of an ANN system with more functions.
Subject(s)
Axons , Brain , Humans , Animals , Dogs , Action Potentials , Diffusion , Engineering , IonsABSTRACT
With the development of wearable devices and hafnium-based ferroelectrics (FE), there is an increasing demand for high-performance flexible ferroelectric memories. However, developing ferroelectric memories that simultaneously exhibit good flexibility and significant performance has proven challenging. Here, we developed a high-performance flexible field-effect transistor (FeFET) device with a thermal budget of less than 400 °C by integrating Zr-doped HfO2 (HZO) and ultra-thin indium tin oxide (ITO). The proposed FeFET has a large memory window (MW) of 2.78 V, a high current on/off ratio (ION/IOFF) of over 108, and high endurance up to 2×107 cycles. In addition, the FeFETs under different bending conditions exhibit excellent neuromorphic properties. The device exhibits excellent bending reliability over 5×105 pulse cycles at a bending radius of 5 mm. The efficient integration of hafnium-based ferroelectric materials with promising ultrathin channel materials (ITO) offers unique opportunities to enable high-performance back-end-of-line (BEOL) compatible wearable FeFETs for edge intelligence applications.
ABSTRACT
As the architecture of logic devices is evolving towards gate-all-around (GAA) structure, research efforts on advanced transistors are increasingly desired. In order to rapidly perform accurate compact modeling for these ultra-scaled transistors with the capability to cover dimensional variations, neural networks are considered. In this paper, a compact model generation methodology based on artificial neural network (ANN) is developed for GAA nanosheet FETs (NSFETs) at advanced technology nodes. The DC and AC characteristics of GAA NSFETs with various physical gate lengths (Lg), nanosheet widths (Wsh) and thicknesses (Tsh), as well as different gate voltages (Vgs) and drain voltages (Vds) are obtained through TCAD simulations. Subsequently, a high-precision ANN model architecture is evaluated. A systematical study on the impacts of ANN size, activation function, learning rate, and epoch (the times of complete pass through the entire training dataset) on the accuracy of ANN models is conducted, and a shallow neural network configuration for generating optimal ANN models is proposed. The results clearly show that the optimized ANN model can reproduce the DC and AC characteristics of NSFETs very accurately with a fitting error (MSE) of 0.01.
ABSTRACT
Low-cost, small-sized, and easy integrated high-performance photodetectors for photonics are still the bottleneck of photonic integrated circuits applications and have attracted increasing attention. The tunable narrow bandgap of two-dimensional (2D) layered molybdenum ditelluride (MoTe2) from â¼0.83 to â¼1.1 eV makes it one of the ideal candidates for near-infrared (NIR) photodetectors. Herein, we demonstrate an excellent waveguide-integrated NIR photodetector by transferring mechanically exfoliated 2D MoTe2onto a silicon nitride (Si3N4) waveguide. The photoconductive photodetector exhibits excellent responsivity (R), detectivity (D*), and external quantum efficiency at 1550 nm and 50 mV, which are 41.9 A W-1, 16.2 × 1010Jones, and 3360%, respectively. These optoelectronic performances are 10.2 times higher than those of the free-space device, revealing that the photoresponse of photodetectors can be enhanced due to the presence of waveguide. Moreover, the photodetector also exhibits competitive performances over a broad wavelength range from 800 to 1000 nm with a highRof 15.4 A W-1and a largeD* of 59.6 × 109Jones. Overall, these results provide an alternative and prospective strategy for high-performance on-chip broadband NIR photodetectors.
ABSTRACT
In recent years, memristors have successfully demonstrated their significant potential in artificial neural networks (ANNs) and neuromorphic computing. Nonetheless, ANNs constructed by crossbar arrays suffer from cross-talk issues and low integration densities. Here, we propose an eight-layer three-dimensional (3D) vertical crossbar memristor with an ultrahigh rectify ratio (RR > 107) and an ultrahigh nonlinearity (>105) to overcome these limitations, which enables it to reach a >1 Tb array size without reading failure. Furthermore, the proposed 3D RRAM shows advanced endurance (>1010 cycles), retention (>104 s), and uniformity. In addition, several synaptic functions observed in the human brain were mimicked. On the basis of the advanced performance, we constructed a novel 3D ANN, whose learning efficiency and recognition accuracy were enhanced significantly compared with those of conventional single-layer ANNs. These findings hold promise for the development of highly efficient, precise, integrated, and stable VLSI neuromorphic computing systems.
ABSTRACT
As an important biomarker, ammonia exhibits a strong correlation with protein metabolism and specific organ dysfunction. Limited by the immobile instrumental structure, invasive and complicated procedures, and unsatisfactory online sensitivity and selectivity, current medical diagnosis fails to monitor this chemical in real time efficiently. Herein, we present the successful synthesis of a long-range epitaxial metal-organic framework on a millimeter domain-sized single-crystalline graphene substrate (LR-epi-MOF). With a perfect 30° epitaxial angle and a mere 2.8% coincidence site lattice mismatch between the MOF and graphene, this long-range-ordered epitaxial structure boosts the charge transfer from ammonia to the MOF and then to graphene, thereby promoting the overall charge delocalization and exhibiting extraordinary electrical global coupling properties. This unique characteristic imparts a remarkable sensitivity of 0.1 ppb toward ammonia. The sub-ppb detecting capability and high anti-interference ability enable continuous information recording of breath ammonia that is strongly correlated with the intriguing human lifestyle. Wearable electronics based on the LR-epi-MOF could accurately portray the active protein metabolism pattern in real time and provide personal assistance in health management.
Subject(s)
Graphite , Metal-Organic Frameworks , Humans , Ammonia , Graphite/chemistry , ElectronicsABSTRACT
Researching optoelectronic memristors capable of integrating sensory and processing functions is essential for advancing the development of efficient neuromorphic vision. Here, we experimentally demonstrated an all-optical controlled and self-rectifying optoelectronic memristor (OEM) crossbar array with the function of multilevel storage under light stimuli. The NiO/TiO2 device exhibits an ultrahigh (>104) rectifying ratio (RR) thus overcoming the presence of sneak current. The reversible conductance modulation without electric signal involvement provides a novel way to realize ultrafast information processing. The proposed OEM array realized synaptic functions observed in the human brain, including long-term potentiation (LTP), long-term depression (LTD), paired-pulse facilitation (PPF), the transition from short-term memory (STM) to long-term memory (LTM), and learning experience behaviors successfully. The authors present a novel OEM crossbar that possesses complete light-modulation capabilities, potentially advancing the future development of efficient neuromorphic vision.
ABSTRACT
Emulating the human nervous system to build next-generation computing architectures is considered a promising way to solve the von Neumann bottleneck. Transistors based on ferroelectric layers are strong contenders for the basic unit of artificial neural systems due to their advantages of high speed and low power consumption. In this work, the potential of Fe-TFTs integrating the HfLaO ferroelectric film and ultra-thin ITO channel for artificial synaptic devices is demonstrated for the first time. The Fe-TFTs can respond significantly to pulses as low as 14 ns with an energy consumption of 93.1 aJ, which is at the leading level for similar devices. In addition, Fe-TFTs exhibit essential synaptic functions and achieve a recognition rate of 93.2% for handwritten digits. Notably, a novel reconfigurable approach involving the combination of two types of electrical pulses to realize Boolean logic operations ("AND", "OR") within a single Fe-TFT has been introduced for the first time. The simulations of array-level operations further demonstrated the potential for parallel computing. These multifunctional Fe-TFTs reveal new hardware options for neuromorphic computing chips.
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The concept of high entropy is considered promising to enhance electromagnetic wave absorption properties. However, preparing high-entropy sulfides with unique structures for high-performance electromagnetic absorption remains a challenge. In this study, hierarchical porous flower-like dual-phase sulfides were designed with increased entropy and fabricated using a versatile approach. The porous flower configuration enhanced the scattering of electromagnetic waves and the impedance-matching characteristics. Additionally, the effect of high entropy induced diverse defects that were favorable for electromagnetic wave dissipation in dual-phase sulfides. The design of the dual-phase structure generated strong interface polarization, and the composition and content of the phases exhibited clear changes with the increase in the number of metal elements. Interestingly, apparent lattice distortions, defects, and shear strains were directly observed near the dual-phase interface of millerite (102) and pyrite (220) planes, facilitating the occurrence of dipole polarization. Consequently, the developed dual-phase high-entropy sulfide exhibited outstanding microwave absorption properties. The minimum reflection loss value of (FeCoNiCuZn)S was -45.8 dB at a thickness of 1.5 mm, and the optimal effective absorption bandwidth was 3.8 GHz at a thickness of 1.4 mm thickness. Thus, the design of high-entropy sulfides brings meaningful guidance for tuning the wave absorption properties in sulfides.
ABSTRACT
Flip chip bonding technology on gold-tin (Au-Sn) microbumps for MEMS (Micro Electro Mechanical Systems) and 3D packaging is becoming increasingly important in the electronics industry. The main advantages of Au-Sn microbumps are a low electrical resistance, high electrical reliability, and fine pitch. However, the bonding temperature is relatively high, and the forming mechanism of an intermetallic compound (IMC) is complicated. In this study, Au-Sn solid-state diffusion (SSD) bonding is performed using the thermal gradient bonding (TGB) method, which lowers bonding temperature and gains high bonding strength in a short time. Firstly, Au-Sn microbumps with a low roughness are prepared by using an optimized process. Then, Au-Sn bonding parameters including bonding temperature, bonding time, and bonding pressure are optimized to obtain a higher bonding quality. The shear strength of 23.898 MPa is obtained when bonding in the HCOOH environment for 10 min at the gradient temperature of 150 °C/250 °C with a bonding pressure of more than 10 MPa. The IMC of Au-Sn is found to be Au-Sn and Au5Sn. The effect of annealing time on the IMC is also investigated. More and more Au5Sn is generated with an increase in annealing time, and Au5Sn is formed after Sn is depleted. Finally, the effect of annealing time on the IMC is verified by using finite element simulation, and the bonding strength of IMC was found to be higher when the bonding temperature is 150 °C at the cold side and 250 °C at the hot side. The temperature in the bonding area can reach 200 °C, which proves that the Au-Sn bonding process is solid-state diffusion because the temperature gradient reaches 2500 °C/cm.
ABSTRACT
The complementary field-effect transistor (CFET) with N-type FET (NFET) stacked on P-type FET (PFET) is a promising device structure based on gate-all-around FET (GAAFET). Because of the high-density stacked structure, the self-heating effect (SHE) becomes more and more severe. Buried thermal rail (BTR) technology on top of the buried power rail (BPR) process is proposed to improve heat dissipation. Through a systematical 3D Technology Computer Aided Design (TCAD) simulation, compared to traditional CFET and CFET with BPR only, the thermal resistance (Rth) of CFET can be significantly reduced with BTR technology, while the drive capability is also improved. Furthermore, based on the proposed BTR technology, different power delivery structures of top-VDD-top-VSS (TDTS), bottom-VDD-bottom-VSS (BDBS), and bottom-VDD-top-VSS (BDTS) were investigated in terms of electrothermal and parasitic characteristics. The Rth of the BTR-BDTS structure is decreased by 5% for NFET and 9% for PFET, and the Ion is increased by 2% for NFET and 7% for PFET.
ABSTRACT
A systematic study of epi-AlGaN/GaN on a SiC substrate was conducted through a comprehensive analysis of material properties and device performance. In this novel epitaxial design, an AlGaN/GaN channel layer was grown directly on the AlN nucleation layer, without the conventional doped thick buffer layer. Compared to the conventional epi-structures on the SiC and Si substrates, the non-buffer epi-AlGaN/GaN structure had a better crystalline quality and surface morphology, with reliable control of growth stress. Hall measurements showed that the novel structure exhibited comparable transport properties to the conventional epi-structure on the SiC substrate, regardless of the buffer layer. Furthermore, almost unchanged carrier distribution from room temperature to 150 °C indicated excellent two-dimensional electron gas (2DEG) confinement due to the pulling effect of the conduction band from the nucleation layer as a back-barrier. High-performance depletion-mode MIS-HEMTs were demonstrated with on-resistance of 5.84 Ω·mm and an output current of 1002 mA/mm. The dynamic characteristics showed a much smaller decrease in the saturation current (only ~7%), with a quiescent drain bias of 40 V, which was strong evidence of less electron trapping owing to the high-quality non-buffer AlGaN/GaN epitaxial growth.
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A novel atomic-level post-etch-surface-reinforcement (PESR) process is developed to recover the p-GaN etching induced damage region for high performance p-GaN gate HEMTs fabrication. This process is composed of a self-limited surface modification step with O2 plasma, following by an oxide removal step with BCl3 plasma. With PESR process, the AlGaN surface morphology after p-GaN etching was comparable to the as-epitaxial level by AFM characterization, and the AlGaN lattice crystallization was also recovered which was measured in a confocal Raman system. The electrical measurement further confirmed the significant improvement of AlGaN surface quality, with one-order of magnitude lower surface leakage in a metal-semiconductor (MS) Schottky-diode and 6 times lower interface density of states (Dit) in a MIS C-V characterization. The XPS analysis of Al2O3/AlGaN showed that the p-GaN etching induced F-byproduct and Ga-oxide was well removed and suppressed by PESR process. Finally, the developed PESR process was successfully integrated in p-GaN gate HEMTs fabrication, and the device performance was significantly enhanced with ~20% lower of on-resistance and ~25% less of current collapse at Vds,Q bias of 40 V, showing great potential of leverage p-GaN gate HEMTs reliability.
ABSTRACT
In this work, we demonstrated a low current collapse normally on Al2O3/AlGaN/GaN MIS-HEMT with in situ H-radical surface treatment on AlGaN. The in situ atomic pretreatment was performed in a specially designed chamber prior to the thermal ALD-Al2O3 deposition, which improved the Al2O3/AlGaN interface with Dit of ~2 × 1012 cm-2 eV-1, and thus effectively reduced the current collapse and the dynamic Ron degradation. The devices showed good electrical performance with low Vth hysteresis and peak trans-conductance of 107 mS/mm. Additionally, when the devices operated under 25 °C pulse-mode stress measurement with VDS,Q = 40 V (period of 1 ms, pulse width of 1 µs), the dynamic Ron increase of ~14.1% was achieved.