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1.
J Nanosci Nanotechnol ; 12(7): 5392-6, 2012 Jul.
Article in English | MEDLINE | ID: mdl-22966577

ABSTRACT

As dimensions of resistive random access memories (RRAMs) devices continue to shrink, the low-frequency noise of nanoscale devices has become increasingly important in evaluating the device reliability. Thus, we investigated random telegraph noise (RTN) caused by capture and emission of an electron at traps. We physically analyzed capture and emission processes through systematic measurements of amorphous TiOx (alpha-TiOx)-based bipolar RRAMs. RTNs were observed during high-resistance state (HRS) in most devices. However, discrete switching behavior was scarcely observed in low-resistance state (LRS) as most of traps in the alpha-TiOx were filled with mobile ions such as O2- in LRS. The capture and emission processes of an electron at traps are largely divided into two groups: (1) both capture and emission processes are mainly affected by electric field; and (2) one of the capture and emission processes is only influenced by the thermal process. This paper provides fundamental physics required to understand the mechanism of RTNs in alpha-TiOx-based bipolar RRAMs.

2.
Nanotechnology ; 22(31): 315201, 2011 Aug 05.
Article in English | MEDLINE | ID: mdl-21730757

ABSTRACT

A multi-level capacitor-less memory cell was fabricated with a fully depleted n-metal-oxide-semiconductor field-effect transistor on a nano-scale strained silicon channel on insulator (FD sSOI n-MOSFET). The 0.73% biaxial tensile strain in the silicon channel of the FD sSOI n-MOSFET enhanced the effective electron mobility to ∼ 1.7 times that with an unstrained silicon channel. This thereby enables both front- and back-gate cell operations, demonstrating eight-level volatile memory-cell operation with a 1 ms retention time and 12 µA memory margin. This is a step toward achieving a terabit volatile memory cell.

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