ABSTRACT
We demonstrate a one-step fabrication of patterned graphene on SiO2 substrates through a process free from catalysts, transfer, and lithography. By simply placing a shadow mask during the plasma enhanced chemical vapor deposition (PECVD) of graphene, an arbitrary shape of graphene can be obtained on SiO2 substrate. The formation of graphene underneath the shadow mask was effectively prevented by the low-temperature, catalyst-free process. Growth conditions were optimized to form polycrystalline graphene on SiO2 substrates and the crystalline structure was characterized by Raman spectroscopy and transmission electron microscopy (TEM). Patterned graphene on SiO2 functions as a field-effect device by itself. Our method is compatible with present device processing techniques, and should be highly desirable for the proliferation of graphene applications.
ABSTRACT
The integration of graphene into devices is a challenging task because the preparation of a graphene-based device usually includes graphene growth on a metal surface at elevated temperatures (â¼1000 °C) and a complicated postgrowth transfer process of graphene from the metal catalyst. Here we report a direct integration approach for incorporating polycrystalline graphene into light emitting diodes (LEDs) at low temperature by plasma-assisted metal-catalyst-free synthesis. Thermal degradation of the active layer in LEDs is negligible at our growth temperature, and LEDs could be fabricated without a transfer process. Moreover, in situ ohmic contact formation is observed between DG and p-GaN resulting from carbon diffusion into the p-GaN surface during the growth process. As a result, the contact resistance is reduced and the electrical properties of directly integrated LEDs outperform those of LEDs with transferred graphene electrodes. This relatively simple method of graphene integration will be easily adoptable in the industrialization of graphene-based devices.
ABSTRACT
Light-emitting diodes (LEDs) become an attractive alternative to conventional light sources due to high efficiency and long lifetime. However, different material properties between GaN and sapphire cause several problems such as high defect density in GaN, serious wafer bowing, particularly in large-area wafers, and poor light extraction of GaN-based LEDs. Here, we suggest a new growth strategy for high efficiency LEDs by incorporating silica hollow nanospheres (S-HNS). In this strategy, S-HNSs were introduced as a monolayer on a sapphire substrate and the subsequent growth of GaN by metalorganic chemical vapor deposition results in improved crystal quality due to nano-scale lateral epitaxial overgrowth. Moreover, well-defined voids embedded at the GaN/sapphire interface help scatter lights effectively for improved light extraction, and reduce wafer bowing due to partial alleviation of compressive stress in GaN. The incorporation of S-HNS into LEDs is thus quite advantageous in achieving high efficiency LEDs for solid-state lighting.
ABSTRACT
Topological insulators (TIs) are exotic materials which have topologically protected states on the surface due to strong spin-orbit coupling. However, a lack of ordered growth of TI thin films on amorphous dielectrics and/or insulators presents a challenge for applications of TI-junctions. We report the growth of topological insulator Bi2Se3 thin films on amorphous SiO2 by molecular beam epitaxy (MBE). To achieve the ordered growth of Bi2Se3 on an amorphous surface, the formation of other phases at the interface is suppressed by Se passivation. Structural characterizations reveal that Bi2Se3 films are grown along the [001] direction with a good periodicity by the van der Waals epitaxy mechanism. A weak anti-localization effect of Bi2Se3 films grown on amorphous SiO2 shows a modulated electrical property by the gating response. Our approach for ordered growth of Bi2Se3 on an amorphous dielectric surface presents considerable advantages for TI-junctions with amorphous insulator or dielectric thin films.
ABSTRACT
A single-layer graphene is synthesized on Cu foil in the absence of H(2) flow by plasma enhanced chemical vapor deposition (PECVD). In lieu of an explicit H(2) flow, hydrogen species are produced during the methane decomposition process into their active species (CH(x<4)), assisted with the plasma. Notably, the early stage of growth depends strongly on the plasma power. The resulting grain size (the nucleation density) has a maximum (minimum) at 50 W and saturates when the plasma power is higher than 120 W because hydrogen partial pressures are effectively tuned by a simple control of the plasma power. Raman spectroscopy and transport measurements show that decomposed methane alone can provide a sufficient amount of hydrogen species for high-quality graphene synthesis by PECVD.
Subject(s)
Copper/chemistry , Graphite/chemistry , Hydrogen/chemistry , Membranes, Artificial , Metal Nanoparticles/chemistry , Methane/chemistry , Plasma Gases/chemistry , Materials Testing , Metal Nanoparticles/ultrastructure , Surface PropertiesABSTRACT
Today, state-of-the-art III-Ns technology has been focused on the growth of c-plane nitrides by metal-organic chemical vapor deposition (MOCVD) using a conventional two-step growth process. Here we show that the use of graphene as a coating layer allows the one-step growth of heteroepitaxial GaN films on sapphire in a MOCVD reactor, simplifying the GaN growth process. It is found that the graphene coating improves the wetting between GaN and sapphire, and, with as little as ~0.6 nm of graphene coating, the overgrown GaN layer on sapphire becomes continuous and flat. With increasing thickness of the graphene coating, the structural and optical properties of one-step grown GaN films gradually transition towards those of GaN films grown by a conventional two-step growth method. The InGaN/GaN multiple quantum well structure grown on a GaN/graphene/sapphire heterosystem shows a high internal quantum efficiency, allowing the use of one-step grown GaN films as 'pseudo-substrates' in optoelectronic devices. The introduction of graphene as a coating layer provides an atomic playground for metal adatoms and simplifies the III-Ns growth process, making it potentially very useful as a means to grow other heteroepitaxial films on arbitrary substrates with lattice and thermal mismatch.
ABSTRACT
Although graphene looks attractive to replace indium tin oxide (ITO) in optoelectronic devices, the luminous efficiency of light emitting diodes (LEDs) with graphene transparent conducting electrodes has been limited by degradation in graphene taking place during device fabrication. In this study, it was found that the quality of graphene after the device fabrication was a critical factor affecting the performance of GaN-based LEDs. In this paper, the qualities of graphene after two different device fabrication processes were evaluated by Raman spectroscopy and atomic force microscopy. It was found that graphene was severely damaged and split into submicrometer-scale islands bounded by less conducting boundaries when graphene was transferred onto LED structures prior to the GaN etching process for p-contact formation. On the other hand, when graphene was transferred after the GaN etch and p-contact metallization, graphene remained intact and the resulting InGaN/GaN LEDs showed electrical and optical properties that were very close to those of LEDs with 200 nm thick ITO films. The forward-voltages and light output powers of LEDs were 3.03 V and 9.36 mW at an injection current of 20 mA, respectively.