Inverse design of a polarization demultiplexer for on-chip path-entangled photon-pair sources based on single quantum dots.

Epitaxial quantum dots can emit polarization-entangled photon pairs. If orthogonal polarizations are coupled to independent paths, then the photons will be path-entangled. Through inverse design with adjoint method optimization, we design a quantum dot polarization demultiplexer, a nanophotonic geometry that efficiently couples orthogonally polarized transition dipole moments of a single quantum dot to two independent waveguides. We predict 95% coupling efficiency, cross talk less than 0.1%, and Purcell radiative rate enhancement factors over 11.5 for both dipoles, with sensitivity to dipole misalignment and orientation comparable to that of conventional nanophotonic geometries. We anticipate our design will be valuable for the implementation of triggered, high-rate sources of path-entangled photon-pairs on chip.

Ultra-low loss quantum photonic circuits integrated with single quantum emitters.

The scaling of many photonic quantum information processing systems is ultimately limited by the flux of quantum light throughout an integrated photonic circuit. Source brightness and waveguide loss set basic limits on the on-chip photon flux. While substantial progress has been made, separately, towards ultra-low loss chip-scale photonic circuits and high brightness single-photon sources, integration of these technologies has remained elusive. Here, we report the integration of a quantum emitter single-photon source with a wafer-scale, ultra-low loss silicon nitride photonic circuit. We demonstrate triggered and pure single-photon emission into a Si3N4 photonic circuit with ≈ 1 dB/m propagation loss at a wavelength of ≈ 930 nm. We also observe resonance fluorescence in the strong drive regime, showing promise towards coherent control of quantum emitters. These results are a step forward towards scaled chip-integrated photonic quantum information systems in which storing, time-demultiplexing or buffering of deterministically generated single-photons is critical.

Study of the pedestal process for reducing sidewall scattering in photonic waveguides.

In this work we investigate the principles of an alternative method for defining sidewall in optical waveguides fabricated using planar technology. The efficiency of this method is demonstrated through simulations and experimental results regarding propagation losses of a solid core ARROW waveguide fabricated on silicon substrate. It is well known that waveguides fabricated using sidewalls etched via Reactive Ion Etching (RIE) can present high sidewall roughness, especially if metallic hard-masks are used. This is largely responsible for the undesirable losses observed in these waveguides. The basic strategy of the proposed method is to do the etching step, in the fabrication of the waveguides, before the deposition of the core, so as to have the lower cladding layer and part of the silicon substrate etched away. Only after this, is the core of the waveguide deposited. This results in a waveguide sustained by a silicon pedestal. With this process, losses as low as 0.45 dB cm-1 for multimode and 0.84 dB cm-1 for single mode waveguides are obtained. The numerical simulations demonstrate that roughness in sidewalls implicates in propagation losses which are at least five times larger that those in the bulk of the material, thus corroborating the idea behind the proposed method.