High-isolation antenna array using SIW and realized with a graphene layer for sub-terahertz wireless applications.

This paper presents the results of a study on developing an effective technique to increase the performance characteristics of antenna arrays for sub-THz integrated circuit applications. This is essential to compensate the limited power available from sub-THz sources. Although conventional array structures can provide a solution to enhance the radiation-gain performance however in the case of small-sized array structures the radiation properties can be adversely affected by mutual coupling that exists between the radiating elements. It is demonstrated here the effectiveness of using SIW technology to suppress surface wave propagations and near field mutual coupling effects. Prototype of 2 × 3 antenna arrays were designed and constructed on a polyimide dielectric substrate with thickness of 125 µm for operation across 0.19-0.20 THz. The dimensions of the array were 20 × 13.5 × 0.125 mm3. Metallization of the antenna was coated with 500 nm layer of Graphene. With the proposed technique the isolation between the radiating elements was improved on average by 22.5 dB compared to a reference array antenna with no SIW isolation. The performance of the array was enhanced by transforming the patch to exhibit metamaterial characteristics. This was achieved by embedding the patch antennas in the array with sub-wavelength slots. Compared to the reference array the metamaterial inspired structure exhibits improvement in isolation, radiation gain and efficiency on average by 28 dB, 6.3 dBi, and 34%, respectively. These results show the viability of proposed approach in developing antenna arrays for application in sub-THz integrated circuits.

Study on improvement of the performance parameters of a novel 0.41-0.47 THz on-chip antenna based on metasurface concept realized on 50 µm GaAs-layer.

A feasibility study is presented on the performance parameters of a novel on-chip antenna based on metasurface technology at terahertz band. The proposed metasurface on-chip antenna is constructed on an electrically thin high-permittivity gallium arsenide (GaAs) substrate layer. Metasurface is implemented by engraving slot-lines on an array of 11 × 11 circular patches fabricated on the top layer of the GaAs substrate and metallic via-holes implemented in the central patch of each row constituting the array, which connects the patch to the leaky-wave open-ended feeding slot-lines running underneath the patches. The slot-lines are connected to each other with a slit. A waveguide port is used to excite the array via slot-lines that couple the electromagnetic energy to the patches. The metasurface on-chip antenna is shown to exhibit an average measured gain in excess of 10 dBi and radiation efficiency above 60% over a wide frequency range from 0.41 to 0.47 THz, which is significant development over other on-chip antenna techniques reported to date. Dimensions of the antenna are 8.6 × 8.6 × 0.0503 mm3. The results show that the proposed GaAs-based metasurface on-chip antenna is viable for applications in terahertz integrated circuits.