Real- and Q-space travelling: multi-dimensional distribution maps of crystal-lattice strain (∊044) and tilt of suspended monolithic silicon nanowire structures.

Silicon nanowire-based sensors find many applications in micro- and nano-electromechanical systems, thanks to their unique characteristics of flexibility and strength that emerge at the nanoscale. This work is the first study of this class of micro- and nano-fabricated silicon-based structures adopting the scanning X-ray diffraction microscopy technique for mapping the in-plane crystalline strain (∊044) and tilt of a device which includes pillars with suspended nanowires on a substrate. It is shown how the micro- and nanostructures of this new type of nanowire system are influenced by critical steps of the fabrication process, such as electron-beam lithography and deep reactive ion etching. X-ray analysis performed on the 044 reflection shows a very low level of lattice strain (<0.00025 Δd/d) but a significant degree of lattice tilt (up to 0.214°). This work imparts new insights into the crystal structure of micro- and nanomaterial-based sensors, and their relationship with critical steps of the fabrication process.

A deep etching mechanism for trench-bridging silicon nanowires.

Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 µm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.