Two-Dimensional Tunneling Memtransistor with Thin-Film Heterostructure for Low-Power Logic-in-Memory Complementary Metal-Oxide Semiconductor.

With the demand for high-performance and miniaturized semiconductor devices continuously rising, the development of innovative tunneling transistors via efficient stacking methods using two-dimensional (2D) building blocks has paramount importance in the electronic industry. Hence, 2D semiconductors with atomically thin geometries hold significant promise for advancements in electronics. In this study, we introduced tunneling memtransistors with a thin-film heterostructure composed of 2D semiconducting MoS2 and WSe2. Devices with the dual function of tuning and memory operation were realized by the gate-regulated modulation of the barrier height at the heterojunction and manipulation of intrinsic defects within the exfoliated nanoflakes using solution processes. Further, our investigation revealed extensive edge defects and four distinct defect types, namely monoselenium vacancies, diselenium vacancies, tungsten vacancies, and tungsten adatoms, in the interior of electrochemically exfoliated WSe2 nanoflakes. Additionally, we constructed complementary metal-oxide semiconductor-based logic-in-memory devices with a small static power in the range of picowatts using the developed tunneling memtransistors, demonstrating a promising approach for next-generation low-power nanoelectronics.

Selenium-alloyed tellurium oxide for amorphous p-channel transistors.

Compared to polycrystalline semiconductors, amorphous semiconductors offer inherent cost-effective, simple and uniform manufacturing. Traditional amorphous hydrogenated Si falls short in electrical properties, necessitating the exploration of new materials. The creation of high-mobility amorphous n-type metal oxides, such as a-InGaZnO (ref. 1), and their integration into thin-film transistors (TFTs) have propelled advancements in modern large-area electronics and new-generation displays2-8. However, finding comparable p-type counterparts poses notable challenges, impeding the progress of complementary metal-oxide-semiconductor technology and integrated circuits9-11. Here we introduce a pioneering design strategy for amorphous p-type semiconductors, incorporating high-mobility tellurium within an amorphous tellurium suboxide matrix, and demonstrate its use in high-performance, stable p-channel TFTs and complementary circuits. Theoretical analysis unveils a delocalized valence band from tellurium 5p bands with shallow acceptor states, enabling excess hole doping and transport. Selenium alloying suppresses hole concentrations and facilitates the p-orbital connectivity, realizing high-performance p-channel TFTs with an average field-effect hole mobility of around 15 cm2 V-1 s-1 and on/off current ratios of 106-107, along with wafer-scale uniformity and long-term stabilities under bias stress and ambient ageing. This study represents a crucial stride towards establishing commercially viable amorphous p-channel TFT technology and complementary electronics in a low-cost and industry-compatible manner.

High-Performance Solution-Processed 2D P-Type WSe2 Transistors and Circuits through Molecular Doping.

Semiconducting ink based on 2D single-crystal flakes with dangling-bond-free surfaces enables the implementation of high-performance devices on form-free substrates by cost-effective and scalable printing processes. However, the lack of solution-processed p-type 2D semiconducting inks with high mobility is an obstacle to the development of complementary integrated circuits. Here, a versatile strategy of doping with Br2 is reported to enhance the hole mobility by orders of magnitude for p-type transistors with 2D layered materials. Br2 -doped WSe2 transistors show a field-effect hole mobility of more than 27 cm2  V-1  s-1 , and a high on/off current ratio of ≈107 , and exhibits excellent operational stability during the on-off switching, cycling, and bias stressing testing. Moreover, complementary inverters composed of patterned p-type WSe2 and n-type MoS2 layered films are demonstrated with an ultra-high gain of 1280 under a driving voltage (VDD ) of 7 V. This work unveils the high potential of solution-processed 2D semiconductors with low-temperature processability for flexible devices and monolithic circuitry.

Evaporated nanometer chalcogenide films for scalable high-performance complementary electronics.

The exploration of stable and high-mobility semiconductors that can be grown over a large area using cost-effective methods continues to attract the interest of the electronics community. However, many mainstream candidates are challenged by scarce and expensive components, manufacturing costs, low stability, and limitations of large-area growth. Herein, we report wafer-scale ultrathin (metal) chalcogenide semiconductors for high-performance complementary electronics using standard room temperature thermal evaporation. The n-type bismuth sulfide delivers an in-situ transition from a conductor to a high-mobility semiconductor after mild post-annealing with self-assembly phase conversion, achieving thin-film transistors with mobilities of over 10 cm2 V-1 s-1, on/off current ratios exceeding 108, and high stability. Complementary inverters are constructed in combination with p-channel tellurium device with hole mobilities of over 50 cm2 V-1 s-1, delivering remarkable voltage transfer characteristics with a high gain of 200. This work has laid the foundation for depositing scalable electronics in a simple and cost-effective manner, which is compatible with monolithic integration with commercial products such as organic light-emitting diodes.

Coexistence of Contact Electrification and Dynamic p-n Junction Modulation Effects in Triboelectrification.

The triboelectric effect occurs when two dissimilar materials are in physical contact, attributed to the combination of contact electrification (CE) and electrostatic induction. It has been extensively explored for the development of high-performance triboelectric nanogenerators (TENGs). In this paper, we report on, besides the CE-related charge generation, an additional charge generation phenomenon associated with the modulation of the p-n junction when two semiconductor materials [methylammonium lead iodide (MAPI) and poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS)] are put in contact and separated dynamically. The electrical outputs generated by the CE effect are determined by the surface potential difference between the two friction materials, while the ones induced by the p-n junction modulation are determined by the dynamic variations in the depletion widths of the two semiconductor friction materials. The outputs generated by the CE effect and the p-n junction effect are well separated in time scale; the p-n junction modulation contributes ∼20% of the total charge generated and could be varied by changing the chemical composition of the semiconductors. The results may provide an alternative method for the development of high-performance TENGs by utilizing this additional p-n junction modulation effect.

High-performance hysteresis-free perovskite transistors through anion engineering.

Despite the impressive development of metal halide perovskites in diverse optoelectronics, progress on high-performance transistors employing state-of-the-art perovskite channels has been limited due to ion migration and large organic spacer isolation. Herein, we report high-performance hysteresis-free p-channel perovskite thin-film transistors (TFTs) based on methylammonium tin iodide (MASnI3) and rationalise the effects of halide (I/Br/Cl) anion engineering on film quality improvement and tin/iodine vacancy suppression, realising high hole mobilities of 20 cm2 V-1 s-1, current on/off ratios exceeding 107, and threshold voltages of 0 V along with high operational stabilities and reproducibilities. We reveal ion migration has a negligible contribution to the hysteresis of Sn-based perovskite TFTs; instead, minority carrier trapping is the primary cause. Finally, we integrate the perovskite TFTs with commercialised n-channel indium gallium zinc oxide TFTs on a single chip to construct high-gain complementary inverters, facilitating the development of halide perovskite semiconductors for printable electronics and circuits.

Large-area patterning of full-color quantum dot arrays beyond 1000 pixels per inch by selective electrophoretic deposition.

Colloidal quantum dot (QD) emitters show great promise in the development of next-generation displays. Although various solution-processed techniques have been developed for nanomaterials, high-resolution and uniform patterning technology amicable to manufacturing is still missing. Here, we present large-area, high-resolution, full-color QD patterning utilizing a selective electrophoretic deposition (SEPD) technique. This technique utilizes photolithography combined with SEPD to achieve uniform and fast fabrication, low-cost QD patterning in large-area beyond 1,000 pixels-per-inch. The QD patterns only deposited on selective electrodes with precisely controlled thickness in a large range, which could cater for various optoelectronic devices. The adjustable surface morphology, packing density and refractive index of QD films enable higher efficiency compared to conventional solution-processed methods. We further demonstrate the versatility of our approach to integrate various QDs into large-area arrays of full-color emitting pixels and QLEDs with good performance. The results suggest a manufacture-viable technology for commercialization of QD-based displays.

Novel Strategy for Organic Cocrystals of n-Type and p-Type Organic Semiconductors with Advanced Optoelectronic Properties.

Cocrystallization has been applied widely for material synthesis. Recently cocrystal of organic molecules has been developing rapidly, taking the advantages of the flexibility and self-assembly of organic molecules. Here we report an experimental study of a cocrystal of copper-phthalocyanines and fluorinated ones. We have grown the samples via the vapor-phase deposition of the mixture with different mass ratios from 1:13.5 to 6:1. As suggested by our scanning electron microscopy (SEM), X-ray diffraction (XRD), and Raman spectroscopy, new crystal structures and morphologies through our novel strategy for the cocrystallization of these molecules have been found. Our work will provide a solid foundation to systematically synthesize the cocrystal of phthalocyanine molecules with new crystal structures, thus providing the opportunity to advance material properties.

Inkjet printed uniform quantum dots as color conversion layers for full-color OLED displays.

Quantum dots (QDs) have shown great potential for next generation displays owing to their fascinating optoelectronic characteristics. In this work, we present a novel full-color display based on blue organic light emitting diodes (BOLEDs) and patterned red and green QD color conversion layers (CCLs). To enable efficient blue-to-green or blue-to-red photoconversion, micrometer-thick QD films with a uniform surface morphology are obtained by utilizing UV-induced polymerization. The uniform QD layers are directly inkjet printed on red and green color filters to further eliminate the residual blue emissions. Based on this QD-BOLED architecture, a 6.6-inch full-color display with 95% Broadcasting Service Television 2020 (BT.2020) color gamut and wide viewing-angles is successfully demonstrated. The inkjet printing method introduced in this work provides a cost-effective way to extend the applications of QDs for full-color displays.

SnO2-rGO nanocomposite as an efficient electron transport layer for stable perovskite solar cells on AZO substrate.

Electron transport layer (ETL) plays an important role in realizing efficient and stable perovskite solar cells (PSCs). There are continuous efforts in developing new types of low cost ETLs with improved conductivity and compatibility with perovskite and the conducting electrode. Here, in order to obtain high efficient and stable PSCs on ZnO:Al (AZO) substrate, reduced graphene oxide (rGO) is incorporated into SnO2 nanoparticles to form composite ETL. For planar PSC on AZO substrates, SnO2-rGO with a low incorporation ratio of 3 wt% rGO significantly enhances the device short circuit current density (J sc) and the fill factor when compared to the device with pristine SnO2 ETL, leading to an overall power conversion efficiency of 16.8% with negligible hysteresis. The effectiveness of the excited charge transfer process of SnO2-rGO ETL is revealed by time-resolved photoluminescence decay, and by electrochemical impedance spectrum measurements. Furthermore, the solar cell stability is also enhanced due to the incorporation of rGO in the ETL. This work provides a low cost and effective ETL modification strategy for achieving high performance planar PSCs.

Reduced graphene oxide-induced crystallization of CuPc interfacial layer for high performance of perovskite photodetectors.

Perovskite-based photodetectors have great potential in light-signal conversion; the suppression of the dark current is regarded as one of the main concerns within the academic research communities to achieve a high-performance photodetector. Interfacial engineering in the transport layer is considered as one of the most essential methods for enhancement of perovskite photodetectors. Here, a nanocomposite thin film of tetra-sulfonated copper phthalocyanines and reduced graphene oxide (TS-CuPc/rGO) was investigated as the interfacial layer in perovskite-based photodetectors. Photodetectors with the TS-CuPc/rGO thin film as the interfacial layer exhibited a low dark current density of 2.2 × 10-8 A cm-2 at bias of -0.1 V as well as high responsivity and detectivity of ∼357 mA W-1 and ∼4.2 × 1012 jones, respectively; moreover, we observed an ON/OFF ratio of 7.33 × 103 to 520 nm light with an intensity of ∼0.077 mW cm-2. Our study revealed that with rGO additives, TS-CuPc molecules were favorable for the formation of an edge-on stacking film with high crystallinity. The rGO-induced crystalline TS-CuPc thin film with lower crystallographic defects effectively reduced the carrier recombination rate at the interfaces, leading to a suppressed dark current and enhanced photocurrent in the photodetector device, when compared to the less crystalline TS-CuPc layer.

Enhanced Detectivity and Suppressed Dark Current of Perovskite-InGaZnO Phototransistor via a PCBM Interlayer.

Hybrid phototransistors based on InGaZnO (IGZO) metal oxide thin-film transistors (TFT) and a photoabsorbing capping layer such as perovskite (MAPbI3) are a promising low-cost device for developing advanced X-ray and UV flat-panel imagers. However, it is found that the introduction of MAPbI3 inevitably damages the IGZO channel layer during fabrication, leading to deteriorated TFT characteristics such as off-current rising and threshold voltage shift. Here, we report an effective approach for improving the performance of the perovskite-IGZO phototransistor by inserting a [6,6]-phenyl C61-butyric acid methyl ester (PCBM) or PCBM:PMMA interlayer between the patterned MAPbI3 and IGZO. The interlayer effectively prevents the IGZO from damage by the perovskite fabrication process, while allowing efficient charge transfer for photosensing. In this configuration, we have achieved a high-detectivity (1.35 × 1012 Jones) perovskite-IGZO phototransistor with suppressed off-state drain current (∼10 pA) in the dark. This work points out the importance of interface engineering for realizing higher performance and reliable heterogeneous phototransistors.