In-Operando Spatiotemporal Imaging of Coupled Film-Substrate Elastodynamics During an Insulator-to-Metal Transition.

The drive toward non-von Neumann device architectures has led to an intense focus on insulator-to-metal (IMT) and the converse metal-to-insulator (MIT) transitions. Studies of electric field-driven IMT in the prototypical VO2 thin-film channel devices are largely focused on the electrical and elastic responses of the films, but the response of the corresponding TiO2 substrate is often overlooked, since it is nominally expected to be electrically passive and elastically rigid. Here, in-operando spatiotemporal imaging of the coupled elastodynamics using X-ray diffraction microscopy of a VO2 film channel device on TiO2 substrate reveals two new surprises. First, the film channel bulges during the IMT, the opposite of the expected shrinking in the film undergoing IMT. Second, a microns thick proximal layer in the substrate also coherently bulges accompanying the IMT in the film, which is completely unexpected. Phase-field simulations of coupled IMT, oxygen vacancy electronic dynamics, and electronic carrier diffusion incorporating thermal and strain effects suggest that the observed elastodynamics can be explained by the known naturally occurring oxygen vacancies that rapidly ionize (and deionize) in concert with the IMT (MIT). Fast electrical-triggering of the IMT via ionizing defects and an active "IMT-like" substrate layer are critical aspects to consider in device applications.

Toward attojoule switching energy in logic transistors.

Advances in the theory of semiconductors in the 1930s in addition to the purification of germanium and silicon crystals in the 1940s enabled the point-contact junction transistor in 1947 and initiated the era of semiconductor electronics. Gordon Moore postulated 18 years later that the number of components in an integrated circuit would double every 1 to 2 years with associated reductions in cost per transistor. Transistor density doubling through scaling-the decrease of component sizes-with each new process node continues today, albeit at a slower pace compared with historical rates of scaling. Transistor scaling has resulted in exponential gain in performance and energy efficiency of integrated circuits, which transformed computing from mainframes to personal computers and from mobile computing to cloud computing. Innovations in new materials, transistor structures, and lithographic technologies will enable further scaling. Monolithic 3D integration, design technology co-optimization, alternative switching mechanisms, and cryogenic operation could enable further transistor scaling and improved energy efficiency in the foreseeable future.

Neural sampling machine with stochastic synapse allows brain-like learning and inference.

Many real-world mission-critical applications require continual online learning from noisy data and real-time decision making with a defined confidence level. Brain-inspired probabilistic models of neural network can explicitly handle the uncertainty in data and allow adaptive learning on the fly. However, their implementation in a compact, low-power hardware remains a challenge. In this work, we introduce a novel hardware fabric that can implement a new class of stochastic neural network called Neural Sampling Machine (NSM) by exploiting the stochasticity in the synaptic connections for approximate Bayesian inference. We experimentally demonstrate an in silico hybrid stochastic synapse by pairing a ferroelectric field-effect transistor (FeFET)-based analog weight cell with a two-terminal stochastic selector element. We show that the stochastic switching characteristic of the selector between the insulator and the metallic states resembles the multiplicative synaptic noise of the NSM. We perform network-level simulations to highlight the salient features offered by the stochastic NSM such as performing autonomous weight normalization for continual online learning and Bayesian inferencing. We show that the stochastic NSM can not only perform highly accurate image classification with 98.25% accuracy on standard MNIST dataset, but also estimate the uncertainty in prediction (measured in terms of the entropy of prediction) when the digits of the MNIST dataset are rotated. Building such a probabilistic hardware platform that can support neuroscience inspired models can enhance the learning and inference capability of the current artificial intelligence (AI).

Interlayer Engineering of Band Gap and Hole Mobility in p-Type Oxide SnO.

The development of high-performance p-type oxides with wide band gap and high hole mobility is critical for the application of oxide semiconductors in back-end-of-line (BEOL) complementary metal-oxide-semiconductor (CMOS) devices. SnO has been intensively studied as a high-mobility p-type oxide due to its low effective hole mass resulting from the hybridized O-2p/Sn-5s orbital character at the valence band edge. However, SnO has a very small band gap (∼0.7 eV) for practical p-type oxide devices. In this work, we report an engineering method to enhance the band gap and hole mobility in SnO. It is found that both the band gap and the hole mobility of a layer-structured SnO increase with the interlayer stacking spacing change. By exploiting this unique electronic structure feature, we propose expanding the interlayer spacing by interlayer intercalation to engineer the band gap and p-type mobility in SnO. Small molecules like NH3 and CH4 are shown to be capable of expanding the interlayer spacing and of increasing the band gap and hole mobility in SnO and thus could potentially serve as the interlayer intercalants. The results provide a viable way for the experimental realization of wide-band-gap and high hole-mobility p-type SnO for BEOL vertical CMOS device applications.

Ultrathin ferroic HfO2-ZrO2 superlattice gate stack for advanced transistors.

With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage1. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO2 (ref. 2), which remains the material of choice to date. Here we report HfO2-ZrO2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric-antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal-oxide-semiconductor capacitors is equivalent to an effective SiO2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO2-based high-dielectric-constant gate stacks without scavenging the interfacial SiO2, which has adverse effects on the electron transport and gate leakage current3. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO2-ZrO2 multilayers, stabilized with competing ferroelectric-antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO2-based high-dielectric-constant materials.

Nanoporous Dielectric Resistive Memories Using Sequential Infiltration Synthesis.

Resistance switching in metal-insulator-metal structures has been extensively studied in recent years for use as synaptic elements for neuromorphic computing and as nonvolatile memory elements. However, high switching power requirements, device variabilities, and considerable trade-offs between low operating voltages, high on/off ratios, and low leakage have limited their utility. In this work, we have addressed these issues by demonstrating the use of ultraporous dielectrics as a pathway for high-performance resistive memory devices. Using a modified atomic layer deposition based technique known as sequential infiltration synthesis, which was developed originally for improving polymer properties such as enhanced etch resistance of electron-beam resists and for the creation of films for filtration and oleophilic applications, we are able to create ∼15 nm thick ultraporous (pore size ∼5 nm) oxide dielectrics with up to 73% porosity as the medium for filament formation. We show, using the Ag/Al2O3 system, that the ultraporous films result in ultrahigh on/off ratio (>109) at ultralow switching voltages (∼±600 mV) that are 10× smaller than those for the bulk case. In addition, the devices demonstrate fast switching, pulsed endurance up to 1 million cycles. and high temperature (125 °C) retention up to 104 s, making this approach highly promising for large-scale neuromorphic and memory applications. Additionally, this synthesis methodology provides a compatible, inexpensive route that is scalable and compatible with existing semiconductor nanofabrication methods and materials.

Roadmap on emerging hardware and technology for machine learning.

Recent progress in artificial intelligence is largely attributed to the rapid development of machine learning, especially in the algorithm and neural network models. However, it is the performance of the hardware, in particular the energy efficiency of a computing system that sets the fundamental limit of the capability of machine learning. Data-centric computing requires a revolution in hardware systems, since traditional digital computers based on transistors and the von Neumann architecture were not purposely designed for neuromorphic computing. A hardware platform based on emerging devices and new architecture is the hope for future computing with dramatically improved throughput and energy efficiency. Building such a system, nevertheless, faces a number of challenges, ranging from materials selection, device optimization, circuit fabrication and system integration, to name a few. The aim of this Roadmap is to present a snapshot of emerging hardware technologies that are potentially beneficial for machine learning, providing the Nanotechnology readers with a perspective of challenges and opportunities in this burgeoning field.

Indium-Tin-Oxide Transistors with One Nanometer Thick Channel and Ferroelectric Gating.

In this work, we demonstrate high-performance indium-tin-oxide (ITO) transistors with a channel thickness down to 1 nm and ferroelectric Hf0.5Zr0.5O2 as gate dielectric. An on-current of 0.243 A/mm is achieved on submicron gate-length ITO transistors with a channel thickness of 1 nm, while it increases to as high as 1.06 A/mm when the channel thickness increases to 2 nm. A raised source/drain structure with a thickness of 10 nm is employed, contributing to a low contact resistance of 0.15 Ω·mm and a low contact resistivity of 1.1 × 10-7 Ω·cm2. The ITO transistor with a recessed channel and ferroelectric gating demonstrates several advantages over 2D semiconductor transistors and other thin-film transistors, including large-area wafer-size nanometer thin-film formation, low contact resistance and contact resistivity, an atomic thin channel being immune to short channel effects, large gate modulation of high carrier density by ferroelectric gating, high-quality gate dielectric and passivation formation, and a large bandgap for the low-power back-end-of-line complementary metal-oxide-semiconductor application.

Supervised Learning in All FeFET-Based Spiking Neural Network: Opportunities and Challenges.

The two possible pathways toward artificial intelligence (AI)-(i) neuroscience-oriented neuromorphic computing [like spiking neural network (SNN)] and (ii) computer science driven machine learning (like deep learning) differ widely in their fundamental formalism and coding schemes (Pei et al., 2019). Deviating from traditional deep learning approach of relying on neuronal models with static nonlinearities, SNNs attempt to capture brain-like features like computation using spikes. This holds the promise of improving the energy efficiency of the computing platforms. In order to achieve a much higher areal and energy efficiency compared to today's hardware implementation of SNN, we need to go beyond the traditional route of relying on CMOS-based digital or mixed-signal neuronal circuits and segregation of computation and memory under the von Neumann architecture. Recently, ferroelectric field-effect transistors (FeFETs) are being explored as a promising alternative for building neuromorphic hardware by utilizing their non-volatile nature and rich polarization switching dynamics. In this work, we propose an all FeFET-based SNN hardware that allows low-power spike-based information processing and co-localized memory and computing (a.k.a. in-memory computing). We experimentally demonstrate the essential neuronal and synaptic dynamics in a 28 nm high-K metal gate FeFET technology. Furthermore, drawing inspiration from the traditional machine learning approach of optimizing a cost function to adjust the synaptic weights, we implement a surrogate gradient (SG) learning algorithm on our SNN platform that allows us to perform supervised learning on MNIST dataset. As such, we provide a pathway toward building energy-efficient neuromorphic hardware that can support traditional machine learning algorithms. Finally, we undertake synergistic device-algorithm co-design by accounting for the impacts of device-level variation (stochasticity) and limited bit precision of on-chip synaptic weights (available analog states) on the classification accuracy.

Stochastic Resonance in Insulator-Metal-Transition Systems.

Stochastic resonance (SR) is an ingenious phenomenon observed in nature and in biological systems but has seen very few practical applications in engineering. It has been observed and analyzed in widely different natural phenomenon including in bio-organisms (e.g. Mechanoreceptor of crayfish) and in environmental sciences (e.g. the periodic occurrence of ice ages). The main idea behind SR seems quite unorthodox - it proposes that noise, that is intrinsically present in a system or is extrinsically added, can help enhance the signal power at the output, in a desired frequency range. Despite its promise and ubiquitous presence in nature, SR has not been successively harnessed in engineering applications. In this work, we demonstrate both experimentally as well as theoretically how the intrinsic threshold noise of an insulator-metal-transition (IMT) material can enable SR. We borrow inspiration from natural systems which use SR to detect and amplify low-amplitude signals, to demonstrate how a simple electrical circuit which uses an IMT device can exploit SR in engineering applications. We explore two such applications: one of them utilizes noise to correctly transmit signals corresponding to different vowel sounds akin to auditory nerves, without amplifying the amplitude of the input audio sound. This finds applications in cochlear implants where ultra-low power consumption is a primary requirement. The second application leverages the frequency response of SR, where the loss of resonance at out-of-band frequencies is used. We demonstrate how to provide frequency selectivity by tuning an extrinsically added noise to the system.

A Swarm Optimization Solver Based on Ferroelectric Spiking Neural Networks.

As computational models inspired by the biological neural system, spiking neural networks (SNN) continue to demonstrate great potential in the landscape of artificial intelligence, particularly in tasks such as recognition, inference, and learning. While SNN focuses on achieving high-level intelligence of individual creatures, Swarm Intelligence (SI) is another type of bio-inspired models that mimic the collective intelligence of biological swarms, i.e., bird flocks, fish school and ant colonies. SI algorithms provide efficient and practical solutions to many difficult optimization problems through multi-agent metaheuristic search. Bridging these two distinct subfields of artificial intelligence has the potential to harness collective behavior and learning ability of biological systems. In this work, we explore the feasibility of connecting these two models by implementing a generalized SI model on SNN. In the proposed computing paradigm, we use SNNs to represent agents in the swarm and encode problem solutions with the spike firing rate and with spike timing. The coupled neurons communicate and modulate each other's action potentials through event-driven spikes and synchronize their dynamics around the states of optimal solutions. We demonstrate that such an SI-SNN model is capable of efficiently solving optimization problems, such as parameter optimization of continuous functions and a ubiquitous combinatorial optimization problem, namely, the traveling salesman problem with near-optimal solutions. Furthermore, we demonstrate an efficient implementation of such neural dynamics on an emerging hardware platform, namely ferroelectric field-effect transistor (FeFET) based spiking neurons. Such an emerging in-silico neuron is composed of a compact 1T-1FeFET structure with both excitatory and inhibitory inputs. We show that the designed neuromorphic system can serve as an optimization solver with high-performance and high energy-efficiency.

Programmable coupled oscillators for synchronized locomotion.

The striking similarity between biological locomotion gaits and the evolution of phase patterns in coupled oscillatory network can be traced to the role of central pattern generator located in the spinal cord. Bio-inspired robotics aim at harnessing this control approach for generation of rhythmic patterns for synchronized limb movement. Here, we utilize the phenomenon of synchronization and emergent spatiotemporal pattern from the interaction among coupled oscillators to generate a range of locomotion gait patterns. We experimentally demonstrate a central pattern generator network using capacitively coupled Vanadium Dioxide nano-oscillators. The coupled oscillators exhibit stable limit-cycle oscillations and tunable natural frequencies for real-time programmability of phase-pattern. The ultra-compact 1 Transistor-1 Resistor implementation of oscillator and bidirectional capacitive coupling allow small footprint area and low operating power. Compared to biomimetic CMOS based neuron and synapse models, our design simplifies on-chip implementation and real-time tunability by reducing the number of control parameters.

Stabilizing the commensurate charge-density wave in 1T-tantalum disulfide at higher temperatures via potassium intercalation.

The 1T phase of tantalum disulfide (1T-TaS2) possesses a variety of charge-density-wave (CDW) orders, and as a result, it attracts an increasing amount of academic and technological interest. Researchers have devoted tremendous efforts towards understanding the impacts of doping, alloying, intercalation or other triggering agents on its charge density wave orders. In this work, we demonstrate that incorporating potassium chloride (KCl) during chemical vapor deposition (CVD) of TaS2 can control the phase (1T, 2H or metal nanowires) via the intercalation of potassium ions (K+) between TaS2 layers. Finally, we demonstrate that K+ not only impacts the structure during synthesis but also strongly impacts the CDW phase transition as a function of temperature, increasing the nearly commensurate (NCCDW) to commensurate (CCDW) transition to just below room temperature.

Stochastic IMT (Insulator-Metal-Transition) Neurons: An Interplay of Thermal and Threshold Noise at Bifurcation.

Artificial neural networks can harness stochasticity in multiple ways to enable a vast class of computationally powerful models. Boltzmann machines and other stochastic neural networks have been shown to outperform their deterministic counterparts by allowing dynamical systems to escape local energy minima. Electronic implementation of such stochastic networks is currently limited to addition of algorithmic noise to digital machines which is inherently inefficient; albeit recent efforts to harness physical noise in devices for stochasticity have shown promise. To succeed in fabricating electronic neuromorphic networks we need experimental evidence of devices with measurable and controllable stochasticity which is complemented with the development of reliable statistical models of such observed stochasticity. Current research literature has sparse evidence of the former and a complete lack of the latter. This motivates the current article where we demonstrate a stochastic neuron using an insulator-metal-transition (IMT) device, based on electrically induced phase-transition, in series with a tunable resistance. We show that an IMT neuron has dynamics similar to a piecewise linear FitzHugh-Nagumo (FHN) neuron and incorporates all characteristics of a spiking neuron in the device phenomena. We experimentally demonstrate spontaneous stochastic spiking along with electrically controllable firing probabilities using Vanadium Dioxide (VO2) based IMT neurons which show a sigmoid-like transfer function. The stochastic spiking is explained by two noise sources - thermal noise and threshold fluctuations, which act as precursors of bifurcation. As such, the IMT neuron is modeled as an Ornstein-Uhlenbeck (OU) process with a fluctuating boundary resulting in transfer curves that closely match experiments. The moments of interspike intervals are calculated analytically by extending the first-passage-time (FPT) models for Ornstein-Uhlenbeck (OU) process to include a fluctuating boundary. We find that the coefficient of variation of interspike intervals depend on the relative proportion of thermal and threshold noise, where threshold noise is the dominant source in the current experimental demonstrations. As one of the first comprehensive studies of a stochastic neuron hardware and its statistical properties, this article would enable efficient implementation of a large class of neuro-mimetic networks and algorithms.

Silicon compatible Sn-based resistive switching memory.

Large banks of cheap, fast, non-volatile, energy efficient, scalable solid-state memories are an increasingly essential component for today's data intensive computing. Conductive-bridge random access memory (CBRAM) - which involves voltage driven formation and dissolution of Cu or Ag filaments in a Cu (or Ag) anode/dielectric (HfO2 or Al2O3)/inert cathode device - possesses the necessary attributes to fit the requirements. Cu and Ag are, however, fast diffusers and known contaminants in silicon microelectronics. Herein, employing a criterion for electrode metal selection applicable to cationic filamentary devices and using first principles calculations for estimating diffusion barriers in HfO2, we identify tin (Sn) as a rational, silicon CMOS compatible replacement for Cu and Ag anodes in CBRAM devices. We then experimentally fabricate Sn based CBRAM devices and demonstrate very fast, steep-slope memory switching as well as threshold switching, comparable to Cu or Ag based devices. Furthermore, time evolution of the cationic filament formation along with the switching mechanism is discussed based on time domain measurements (I vs. t) carried out under constant voltage stress. The time to threshold is shown to be a function of both the voltage stress (Vstress) as well as the initial leakage current (I0) through the device.

Author Correction: Vertex coloring of graphs via phase dynamics of coupled oscillatory networks.

A correction to this article has been published and is linked from the HTML and PDF versions of this paper. The error has not been fixed in the paper.

ON-state evolution in lateral and vertical VO2 threshold switching devices.

We report the results of finite element simulations of the ON state characteristic of VO2-based threshold switching devices and compare the results with experimental data. The model is based on thermally induced threshold switching (thermal runaway) and successfully reproduces the I-V characteristics showing the formation and growth of the conductive filament in the ON state. Furthermore, we compare the I-V characteristics for two VO2 films with different electrical conductivities in the insulating and metallic phases as well as those based on TaO x and NbO x functional layers.

Vertex coloring of graphs via phase dynamics of coupled oscillatory networks.

While Boolean logic has been the backbone of digital information processing, there exist classes of computationally hard problems wherein this paradigm is fundamentally inefficient. Vertex coloring of graphs, belonging to the class of combinatorial optimization, represents one such problem. It is well studied for its applications in data sciences, life sciences, social sciences and technology, and hence, motivates alternate, more efficient non-Boolean pathways towards its solution. Here we demonstrate a coupled relaxation oscillator based dynamical system that exploits insulator-metal transition in Vanadium Dioxide (VO2) to efficiently solve vertex coloring of graphs. Pairwise coupled VO2 oscillator circuits have been analyzed before for basic computing operations, but using complex networks of VO2 oscillators, or any other oscillators, for more complex tasks have been challenging in theory as well as in experiments. The proposed VO2 oscillator network harnesses the natural analogue between optimization problems and energy minimization processes in highly parallel, interconnected dynamical systems to approximate optimal coloring of graphs. We further indicate a fundamental connection between spectral properties of linear dynamical systems and spectral algorithms for graph coloring. Our work not only elucidates a physics-based computing approach but also presents tantalizing opportunities for building customized analog co-processors for solving hard problems efficiently.

Modeling and in Situ Probing of Surface Reactions in Atomic Layer Deposition.

Atomic layer deposition (ALD) has matured into a preeminent thin film deposition technique by offering a highly scalable and economic route to integrate chemically dissimilar materials with excellent thickness control down to the subnanometer regime. Contrary to its extensive applications, a quantitative and comprehensive understanding of the reaction processes seems intangible. Complex and manifold reaction pathways are possible, which are strongly affected by the surface chemical state. Here, we report a combined modeling and experimental approach utilizing ReaxFF reactive force field simulation and in situ real-time spectroscopic ellipsometry to gain insights into the ALD process of Al2O3 from trimethylaluminum and water on hydrogenated and oxidized Ge(100) surfaces. We deciphered the origin for the different peculiarities during initial ALD cycles for the deposition on both surfaces. While the simulations predicted a nucleation delay for hydrogenated Ge(100), a self-cleaning effect was discovered on oxidized Ge(100) surfaces and resulted in an intermixed Al2O3/GeOx layer that effectively suppressed oxygen diffusion into Ge. In situ spectroscopic ellipsometry in combination with ex situ atomic force microscopy and X-ray photoelectron spectroscopy confirmed these simulation results. Electrical impedance characterizations evidenced the critical role of the intermixed Al2O3/GeOx layer to achieve electrically well-behaved dielectric/Ge interfaces with low interface trap density. The combined approach can be generalized to comprehend the deposition and reaction kinetics of other ALD precursors and surface chemistry, which offers a path toward a theory-aided rational design of ALD processes at a molecular level.