RESUMEN
As ferroelectric hafnium zirconium oxide (HZO) becomes more widely utilized in ferroelectric microelectronics, integration impacts of intentional and nonintentional dielectric interfaces and their effects upon the ferroelectric film wake-up (WU) and circuit parameters become important to understand. In this work, the effect of the addition of a linear dielectric aluminum oxide, Al2O3, below a ferroelectric Hf0.58Zr0.42O2 film in a capacitor structure for FeRAM applications with niobium nitride (NbN) electrodes was measured. Depolarization fields resulting from the linear dielectric is observed to induce a reduction of the remanent polarization of the ferroelectric. Addition of the aluminum oxide also impacts the WU of the HZO with respect to the cycling voltage applied. Intricately linked to the design of a FeRAM 1C/1T cell, the metal-ferroelectric-insulator-metal (MFIM) devices are observed to significantly shift charge related to the read states based on aluminum oxide thickness and WU cycling voltage. A 33% reduction in the separation of read states are measured, which complicates how a memory cell is designed and illustrates the importance of clean interfaces in devices.
RESUMEN
Doped ferroelectric HfO2 is highly promising for integration into complementary metal-oxide semiconductor (CMOS) technology for devices such as ferroelectric nonvolatile memory and low-power field-effect transistors (FETs). We report the direct measurement of the energy barriers between various metal electrodes (Pt, Au, Ta, TaN, Ti/Pt, Ni, Al) and hafnium zirconium oxide (Hf0.58Zr0.42O2, HZO) using internal photoemission (IPE) spectroscopy. Results are compared with valence band offsets determined using the three-sample X-ray photoelectron spectroscopy (XPS) as well as the two-sample hard X-ray photoelectron spectroscopy (HAXPES) techniques. Both XPS and IPE indicate roughly the same dependence of the HZO barrier on metal work function with a slope of 0.8 ± 0.5. XPS and HAXPES-derived barrier heights are on average about 1.1 eV smaller than barrier heights determined by IPE, suggesting the presence of negative charge in the HZO.
RESUMEN
In order to expand the use of nanoscaled silicon structures we present a new etching method that allows us to shape silicon with sub-10 nm precision. This top-down, CMOS compatible etching scheme allows us to fabricate silicon devices with quantum behavior without relying on difficult lateral lithography. We utilize this novel etching process to create quantum dots, quantum wires, vertical transistors and ultra-high-aspect ratio structures. We believe that this etching technique will have broad and significant impacts and applications in nano-photonics, bio-sensing, and nano-electronics.
Asunto(s)
Cristalización/métodos , Nanoestructuras/química , Nanoestructuras/ultraestructura , Puntos Cuánticos , Silicio/química , Transistores Electrónicos , Diseño de Equipo , Análisis de Falla de Equipo , Ensayo de Materiales , Conformación Molecular , Tamaño de la Partícula , Propiedades de SuperficieRESUMEN
Visible and near-IR photoluminescence (PL) is reported from sub-10 nm silicon nanopillars. Pillars were plasma etched from single crystal Si wafers and thinned by utilizing strain-induced, self-terminating oxidation of cylindrical structures. PL, lifetime, and transmission electron microscopy were performed to measure the dimensions and emission characteristics of the pillars. The peak PL energy was found to blue shift with narrowing pillar diameter in accordance with a quantum confinement effect. The blue shift was quantified using a tight binding method simulation that incorporated the strain induced by the thermal oxidation process. These pillars show promise as possible complementary metal oxide semiconductor compatible silicon devices in the form of light-emitting diode or laser structures.