RESUMEN
In many applications like sensors, displays, and defoggers, there is a need for transparent and efficient heater elements produced at low cost. For this reason, we evaluated the performance of graphene-based heaters with from one to five layers of graphene on flexible and transparent polyethylene terephthalate (PET) substrates in terms of their electrothermal properties like heating/cooling rates and steady-state temperatures as a function of the input power density. We found that the heating/cooling rates followed an exponential time dependence with a time constant of just below 6 s for monolayer heaters. From the relationship between the steady-state temperatures and the input power density, a convective heat-transfer coefficient of 60 W·m-2·°C-1 was found, indicating a performance much better than that of many other types of heaters like metal thin-film-based heaters and carbon nanotube-based heaters.
RESUMEN
The design, fabrication, and use of a hotspot-producing and temperature-sensing resistance thermometer for evaluating the thermal properties of low-dimensional materials are described in this paper. The materials that are characterized include one-dimensional (1D) carbon nanotubes, and two-dimensional (2D) graphene and boron nitride films. The excellent thermal performance of these materials shows great potential for cooling electronic devices and systems such as in three-dimensional (3D) integrated chip-stacks, power amplifiers, and light-emitting diodes. The thermometers are designed to be serpentine-shaped platinum resistors serving both as hotspots and temperature sensors. By using these thermometers, the thermal performance of the abovementioned emerging low-dimensional materials was evaluated with high accuracy.
RESUMEN
For future miniaturization of electronic systems using 3D chip stacking, new fine-pitch materials for through-silicon-via (TSV) applications are likely required. In this paper, we propose a novel carbon nanotube (CNT)/copper nanocomposite material consisting of high aspect ratio, vertically aligned CNT bundles coated with copper. These bundles, consisting of hundreds of tiny CNTs, were uniformly coated by copper through electroplating, and aspect ratios as high as 300:1 were obtained. The resistivity of this nanomaterial was found to be as low as â¼10(-8) Ω m, which is of the same order of magnitude as the resistivity of copper, and its temperature coefficient was found to be only half of that of pure copper. The main advantage of the composite TSV nanomaterial is that its coefficient of thermal expansion (CTE) is similar to that of silicon, a key reliability factor. A finite element model was set up to demonstrate the reliability of this composite material and thermal cycle simulations predicted very promising results. In conclusion, this composite nanomaterial appears to be a very promising material for future 3D TSV applications offering both a low resistivity and a low CTE similar to that of silicon.
RESUMEN
In this paper, an embedded fin-like metal-coated carbon nanotube (Fin-M/CNT) structure is demonstrated for flexible and transparent conductor wire applications. Embedded in a polydimethylsiloxane polymeric substrate, Fin-M/CNT wires with a minimum width of 5 µm and a minimum pitch of 10 µm have been achieved. Direct current resistances of single Fin-M/CNT wires, where the supporting CNT structures have been covered by Ti/Al/Au metal coatings of different thicknesses, have been measured. The high aspect ratio of the fin-like structures not only improves the adhesion between the wires and the polymeric substrate, but also yields a low resistance at a small surface footprint. In addition, transparent Fin-M/CNT grid lines with hexagonal patterns, with a sheet resistance of as low as 45 Ω sq(-1) , have been achieved at an optical transmittance of 88%. The robustness of the Fin-M/CNT structures has been demonstrated in bending tests up to 500 cycles and no significant changes in wire resistances are observed.
RESUMEN
The feasibility of using carbon nanotube (CNT) bundles as the fillers of through silicon vias (TSVs) has been demonstrated. CNT bundles are synthesized directly inside TSVs by thermal chemical vapor deposition (TCVD). The growth of CNTs in vias is found to be highly dependent on the geometric dimensions and arrangement patterns of the vias at atmospheric pressure. The CNT-Si structure is planarized by a combined lapping and polishing process to achieve both a high removal rate and a fine surface finish. Electrical tests of the CNT TSVs have been performed and their electrical resistance was found to be in the few hundred ohms range. The reasons for the high electrical resistance have been discussed and possible methods to decrease the electrical resistance have been proposed.
