Polarization-insensitive 1D grating coupler based on a zero-birefringence subwavelength corelet waveguide.

Grating coupler devices provide efficient, foundry-compatible vertical fiber-to-chip coupling solutions in integrated photonic platforms. However, standard grating coupler designs are highly polarization sensitive, which hinders their adoption. We present a new, to the best of our knowledge, type of 1D polarization-insensitive grating coupler (PIGC) that is based on a zero-birefringence subwavelength "corelet" waveguide. We demonstrate a PIGC for coupling in the telecommunications O-band in a 45-nm-node monolithic silicon-on-insulator (SOI) CMOS electronic-photonic platform, with measured insertion losses of 6.7 and 6.1 dB to transverse electric and transverse magnetic polarizations, respectively, and a ±1-dB polarization dependent loss bandwidth of 73 nm.

High-extinction ratio polarization splitter based on an asymmetric directional coupler and on-chip polarizers on a silicon photonics platform.

A high performance compact silicon photonics polarization splitter is proposed and demonstrated. The splitter is based on an asymmetric directional coupler. High extinction ratios at the through and drop ports of the polarization splitter are achieved by using an on-chip TE-pass polarizer and a TM-pass polarizer, respectively. The splitter, implemented on a silicon-on-insulator platform with a 220 nm-thick silicon device layer, has a measured insertion loss lower than 1 dB (for both TE and TM modes) and extinction ratio greater than 25 dB (for TM mode) and greater than 36 dB (for TE mode), in the wavelength range from 1.5 µm to 1.6 µm. The footprint of the device is 12 µm × 15 µm.

Compact multi-million Q resonators and 100 MHz passband filter bank in a thick-SOI photonics platform.

We demonstrate ring and racetrack resonators with Qs of 3.8 to 7.5 million and 100 MHz bandwidth racetrack resonator filters, implemented in a thick silicon-on-insulator foundry platform that features a 3 µm thick device layer. We show that special racetrack resonators (with weakly guiding straight sections that transition to strongly confining bends) implemented in this platform can be preferable to rings for applications such as integrated microwave-photonic signal processing that require filters with sub-GHz bandwidth, tens of GHz of free spectral range (FSR), and a compact footprint for dense system-on-chip integration. We demonstrate ring resonators with 7.5×106 intrinsic Q, but limited FSR of 5.1 GHz and a taxing footprint of 21mm2 due to a large 2.6 mm bend-loss-limited radius. In comparison, we demonstrate two racetrack resonator designs with intrinsic Qs of 3.8×106 and 4.3×106, larger respective FSRs of 11.6 GHz and 7.9 GHz, and less than 1/20th the area of the ring resonator. Using racetrack resonators, we implemented a four-channel, 100 MHz wide passband filter bank with 4.2 to 5.4 dB insertion loss to drop ports.

Triply resonant coupled-cavity electro-optic modulators for RF to optical signal conversion.

We propose an on-chip triply resonant electro-optic modulator architecture for RF-to-optical signal conversion and provide a detailed theoretical analysis of the optimal "circuit-level" device geometries and their performance limits. The designs maximize the RF-optical conversion efficiency through simultaneous resonant enhancement of the RF drive signal, a continuous-wave (CW) optical pump, and the generated optical sideband. The optical pump and sideband are resonantly enhanced in respective supermodes of a two-coupled-cavity optical resonator system, while the RF signal can be enhanced in addition by an LC circuit formed by capacitances of the optical resonator active regions and (integrated) matching inductors. We show that such designs can offer 15-50 dB improvement in conversion efficiency over conventional microring modulators. In the proposed configurations, the photon lifetime (resonance linewidth) limits the instantaneous RF bandwidth of the electro-optic response but does not limit its central RF frequency. The latter is set by the coupling strength between the two coupled cavities and is not subject to the photon lifetime constraint inherent to conventional singly resonant microring modulators. This feature enables efficient operation at high RF carrier frequencies without a reduction in efficiency commonly associated with the photon lifetime limit and accounts for 10-30 dB of the total improvement. Two optical configurations of the modulator are proposed: a "basic" configuration with equal Q-factors in both supermodes, most suitable for narrowband RF signals, and a "generalized" configuration with independently tailored supermode Q-factors that supports a wider instantaneous bandwidth. A second significant 5-20 dB gain in modulation efficiency is expected from RF drive signal enhancement by integrated LC resonant matching, leading to the total expected improvement of 15-50 dB. Previously studied triply-resonant modulators, with coupled longitudinal [across the free spectral range (FSR)] modes, have large resonant mode volume for typical RF frequencies, which limits the interaction between the optical and RF fields. In contrast, the proposed modulators support maximally tightly confined resonant modes, with strong coupling between the mode fields, which increases and maintains high device efficiency across a range of RF frequencies. The proposed modulator architecture is compact, efficient, capable of modulation at high RF carrier frequencies and can be applied to any cavity design or modulation mechanism. It is also well suited to moderate Q, including silicon, implementations, and may be enabling for future CMOS RF-electronic-photonic systems on chip.

Publisher Correction: Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

In this Letter, owing to an error during the production process, the author affiliations were listed incorrectly. Affiliation number 5 (Colleges of Nanoscale Science and Engineering, State University of New York (SUNY)) was repeated, and affiliation numbers 6-8 were incorrect. In addition, the phrase "two oxide thickness variants" should have been "two gate oxide thickness variants". These errors have all been corrected online.

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions1,2. This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing3,4. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip'1,6-8. As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge10,11, this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

Optimal design of a microring cavity optical modulator for efficient RF-to-optical conversion.

The efficiency of optical sideband generation with a microring resonator modulator as a function of modulator parameters is studied taking into account the photon dynamics inside the resonator. The best achievable modulation efficiency is determined for any choice of the resonator intrinsic quality factor, and analytic solutions for the optimum modulator parameters, namely the coupling coefficient and the detuning between the frequencies of the input laser light and the microring resonance, are provided. This analysis is carried out both for a narrowband RF signal, in which case the modulator is optimized for the center frequency of this signal, and for wideband signals, when high conversion efficiency over a wide range of RF frequencies is desired. The obtained results are expected to be useful coherent optical links, direct detection RF receivers, and optical wavelength converters.

Compact silicon TE-pass polarizer using adiabatically-bent fully-etched waveguides.

A high-performance integrated silicon TE-pass polarizer is proposed and demonstrated. The polarizer uses a series of adiabatic waveguide bends that yield high extinction ratio for the TM polarization and low insertion loss for the TE polarization, and does not require special materials or complex fabrication steps. The polarizer, implemented on a silicon-on-insulator platform with a 220 nm silicon thickness, is measured to have insertion loss ≤ 0.37 dB (average 0.12 dB) and extinction ratio ≥ 27.6 dB (average 36.0 dB) over a 1.5 µm to 1.6 µm wavelength range, with a footprint of 63 µm × 9.5 µm. The trade-off between the footprint of the polarizer and its performance is established. While the analysis was done for a silicon-on-insulator platform, the concept is applicable to other waveguide geometries and integrated photonic platforms.

Gradient-index optical fiber lens for efficient fiber-to-chip coupling.

A gradient-index optical fiber lens is proposed and fabricated on the tip of a single-mode fiber using focused ion beam milling. Second-order effective medium theory is used to design a gradual change in the fill factor, which ensures a parabolic effective refractive index distribution. The proposed fiber lens design is simulated via the three-dimensional finite-difference time-domain method, and demonstrated through confocal optical measurements. At a wavelength of 1550 nm, the fabricated lenses focus a 10.4 µm mode field diameter exiting the fiber into spot sizes between 3-5 µm, located 4-6 µm away from the fiber tip. Direct coupling into a silicon-on-insulator chip is also demonstrated, where the fabricated gradient-index lens has a coupling efficiency comparable to a commercial lensed fiber.

Silicon photonic time-wavelength pulse interleaver for photonic analog-to-digital converters.

A 4-channel time-wavelength optical pulse interleaver is implemented on a silicon chip. The interleaver forms a train of pulses with periodically changing wavelengths by demultiplexing the input pulse train into several wavelength components, delaying these components with respect to each other, and multiplexing them back into a single path. The interleaver is integrated on a silicon chip, with two arrays of microring resonator filters performing multiplexing and demultiplexing, and long sections of silicon waveguides acting as delay lines. The 4-channel interleaver is designed for an input pulse train with 1 GHz repetition rate, and is measured to have 0.35% RMS pulse timing error, insertion loss between 1.6 dB and 5.8 dB in different channels, crosstalk below -24 dB, and 52 nm free spectral range achieved using the Vernier effect.

Ultrafast nonlinear optical studies of silicon nanowaveguides.

Results of a self-consistent ultrafast study of nonlinear optical properties of silicon nanowaveguides using heterodyne pump-probe technique are reported. The two-photon absorption coefficient and free-carrier absorption effective cross-section were determined to be 0.68cm/GW, and 1.9x10(-17) cm2, respectively and the Kerr coefficient and free-carrier-induced refractive index change 0.32x10(-13) cm2/W, and -5.5x10(-21) cm3, respectively. The effects of the proton bombardment on the linear loss and the carrier lifetime of the devices were also studied. Carrier lifetime reduction from 330ps to 33ps with a linear loss of only 14.8dB/cm was achieved using a proton bombardment level of 10(15)/cm2.

Photonic ADC: overcoming the bottleneck of electronic jitter.

Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated for many years as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits using a photonic ADC built from discrete components. This accuracy corresponds to a timing jitter of 15 fs - a 4-5 times improvement over the performance of the best electronic ADCs which exist today. On the way towards an integrated photonic ADC, a silicon photonic chip with core photonic components was fabricated and used to digitize a 10 GHz signal with 3.5 effective bits. In these experiments, two wavelength channels were implemented, providing the overall sampling rate of 2.1 GSa/s. To show that photonic ADCs with larger channel counts are possible, a dual 20-channel silicon filter bank has been demonstrated.

Nanophotonic integration in state-of-the-art CMOS foundries.

We demonstrate a monolithic photonic integration platform that leverages the existing state-of-the-art CMOS foundry infrastructure. In our approach, proven XeF2 post-processing technology and compliance with electronic foundry process flows eliminate the need for specialized substrates or wafer bonding. This approach enables intimate integration of large numbers of nanophotonic devices alongside high-density, high-performance transistors at low initial and incremental cost. We demonstrate this platform by presenting grating-coupled, microring-resonator filter banks fabricated in an unmodified 28 nm bulk-CMOS process by sharing a mask set with standard electronic projects. The lithographic fidelity of this process enables the high-throughput fabrication of second-order, wavelength-division-multiplexing (WDM) filter banks that achieve low insertion loss without post-fabrication trimming.

Broadband linearized silicon modulator.

A scheme to achieve a wideband linearized silicon Mach-Zehnder (MZ) modulator is proposed. The modulator consists of a single MZ interferometer with identical reverse-biased silicon diode phase shifters in both arms, driven in a push-pull configuration. It is shown that the 3rd order nonlinearity of the modulator can be eliminated by canceling the nonlinearities from the silicon phase shifters and the MZ transfer function against each other. The 2nd order nonlinearity is simultaneously eliminated by differential detection or operation away from the quadrature point. As a result, the linearity of the proposed silicon modulator greatly exceeds the linearity of a conventional MZ modulator with ideal, linear (e.g. LiNbO3) phase shifters. The simplicity and large optical and RF bandwidth of the proposed modulator make it attractive for analog photonic applications.

Reconfigurable multi-channel second-order silicon microring-resonator filterbanks for on-chip WDM systems.

We report the fabrication of a reconfigurable wide-band twenty-channel second-order dual filterbank, defined on a silicon-on-insulator (SOI) platform, with tunable channel spacing and 20 GHz single-channel bandwidth. We demonstrate the precise tuning of eleven (out of the twenty) channels, with a channel spacing of 124 GHz (~1 nm) and crosstalk between channels of about -45 dB. The effective thermo-optic tuning efficiency is about 27 µW/GHz/ring. A single channel of a twenty-channel counter-propagating filterbank is also demonstrated, showing that both propagating modes exhibit identical filter responses. Considerations about thermal crosstalk are also presented. These filterbanks are suitable for on-chip wavelength-division-multiplexing applications, and have the largest-to-date reported number of channels built on an SOI platform.

Efficient planar fiber-to-chip coupler based on two-stage adiabatic evolution.

A new, efficient adiabatic in-plane fiber-to-chip coupler design is proposed. In this design, the light from the fiber is coupled into a low-index waveguide with matching mode size. The mode is first adiabatically reduced in size with a rib taper, and then transferred into a high-index (e.g. silicon) waveguide with an inverse taper. The two-stage design allows to reduce the coupler length multiple times in comparison with pure inverse taper-based couplers of similar efficiency. The magnitude of length reduction increases with the refractive index of the low-index waveguide and the fiber mode size.