P- and N-type InAs nanocrystals with innately controlled semiconductor polarity.

InAs semiconductor nanocrystals (NCs) exhibit intriguing electrical/optoelectronic properties suitable for next-generation electronic devices. Although there is a need for both n- and p-type semiconductors in such devices, InAs NCs typically exhibit only n-type characteristics. Here, we report InAs NCs with controlled semiconductor polarity. Both p- and n-type InAs NCs can be achieved from the same indium chloride and aminoarsine precursors but by using two different reducing agents, diethylzinc for p-type and diisobutylaluminum hydride for n-type NCs, respectively. This is the first instance of semiconductor polarity control achieved at the synthesis level for InAs NCs and the entire semiconductor nanocrystal systems. Comparable field-effective mobilities for holes (3.3 × 10-3 cm2/V·s) and electrons (3.9 × 10-3 cm2/V·s) are achieved from the respective NC films. The mobility values allow the successful fabrication of complementary logic circuits, including NOT, NOR, and NAND comprising photopatterned p- and n-channels based on InAs NCs.

Approaching Theoretical Limits in the Performance of Printed P-Type CuI Transistors via Room Temperature Vacancy Engineering.

Development of a novel high performing inorganic p-type thin film transistor could pave the way for new transparent electronic devices. This complements the widely commercialized n-type counterparts, indium-gallium-zinc-oxide (IGZO). Of the few potential candidates, copper monoiodide (CuI) stands out. It boasts visible light transparency and high intrinsic hole mobility (>40 cm2 V-1 s-1 ), and is suitable for various low-temperature processes. However, the performance of reported CuI transistors is still below expected mobility, mainly due to the uncontrolled excess charge- and defect-scattering from thermodynamically favored formation of copper and iodine vacancies. Here, a solution-processed CuI transistor with a significantly improved mobility is reported. This enhancement is achieved through a room-temperature vacancy-engineering processing strategy on high-k dielectrics, sodium-embedded alumina. A thorough set of chemical, structural, optical, and electrical analyses elucidates the processing-dependent vacancy-modulation and its corresponding transport mechanism in CuI. This encompasses defect- and phonon-scattering, as well as the delocalization of charges in crystalline domains. As a result, the optimized CuI thin film transistors exhibit exceptionally high hole mobility of 21.6 ± 4.5 cm2 V-1 s-1 . Further, the successful operation of IGZO-CuI complementary logic gates confirms the applicability of the device.